Re: Latest 64-bit linker problem

Alan Modra
2002-08-29T03:09:51Z

On Thu, Aug 29, 2002 at 09:25:27AM +0930, Alan Modra wrote:
> On Wed, Aug 28, 2002 at 12:00:51PM -0400, armartin@ca.ibm.com wrote:
> > We are getting a link failure when we try to use the newest 64-bit enabled
> > linker on 32-bit objects to produce a 32-bit object. For example, if we
> > have a 32-bit object test.o, and we run this command:
> > /opt/ppc64-20020729/powerpc64-linux/bin/ld -r -o a.o test.o -m elf32ppc
> >
> > We get the error:
> > /opt/ppc64-20020729/powerpc64-linux/bin/ld: Relocatable linking with
> > relocations from format elf32-powerpc (test.o) to format elf32-powerpc
> > (a.o) is not supported
>
> Hmm, that does look a little silly. I'll investigate.

Problem was that the 64 bit ld selected the 32 bit emulation mode
(correctly), but the 32 bit arch scan is using the 64 bit default
list of architectures, and ldfile_set_output_arch with plain "powerpc"
will match the 64 bit default arch. That explanation may sound
complicated, but the fix is easy; Just set the 32 bit default to
"powerpc:common".

However, even after fixing this particular problem we still end
up choosing the 64 bit arch, because we later call
bfd_default_set_arch_mach with mach == 0, the value for
"powerpc:common". The problem here is that mach == 0 also means
"select the default machine", which is the 64 bit one. Again, the fix
is easy; Just don't use 0 in any of the bfd_mach_* constants.

Is should be possible to change the bfd_mach_* defines without
breaking anything as they are not written out to object files. Users
of libbfd wouldn't use hard-coded constants would they? Arrgh!
Unfortunately that does happen, even inside bfd. A quick grep showed
a number of places, and I need permission to correct one in gdb before
committing the complete patch. (If that is delayed, I'll just change
the powerpc bfd_mach_* for the time being.) Note that there may well
be other hard-coded machine values lurking, so this patch has
potential to break things. I reckon they need breaking. :)

bfd/ChangeLog
* archures.c (enum bfd_architecture): Change bfd_mach_* defines so
that zero is never used.
* bfd-in2.h: Regenerate.
* cpu-avr.c (compatible): Don't use hard-coded mach constants.
* cpu-powerpc.c (powerpc_compatible): Likewise.
* cpu-rs6000.c (rs6000_compatible): Likewise.

opcodes/ChangeLog
* mips-dis.c (_print_insn_mips): Don't use hard-coded mach constants.

gdb/ChangeLog
* x86-64-tdep.c (_initialize_x86_64_tdep): Don't use hard-coded
mach constants.

ld/ChangeLog
* emulparams/elf32ppc.sh (ARCH): Set to "powerpc:common".

Index: bfd/archures.c
===================================================================
RCS file: /cvs/src/src/bfd/archures.c,v
retrieving revision 1.54
diff -u -p -r1.54 archures.c
--- bfd/archures.c 28 Aug 2002 10:38:44 -0000 1.54
+++ bfd/archures.c 29 Aug 2002 02:48:40 -0000
@@ -144,11 +144,11 @@ DESCRIPTION
.#define bfd_mach_mipsisa32 32
.#define bfd_mach_mipsisa64 64
. bfd_arch_i386, {* Intel 386 *}
-.#define bfd_mach_i386_i386 0
-.#define bfd_mach_i386_i8086 1
-.#define bfd_mach_i386_i386_intel_syntax 2
-.#define bfd_mach_x86_64 3
-.#define bfd_mach_x86_64_intel_syntax 4
+.#define bfd_mach_i386_i386 1
+.#define bfd_mach_i386_i8086 2
+.#define bfd_mach_i386_i386_intel_syntax 3
+.#define bfd_mach_x86_64 64
+.#define bfd_mach_x86_64_intel_syntax 65
. bfd_arch_we32k, {* AT&T WE32xxx *}
. bfd_arch_tahoe, {* CCI/Harris Tahoe *}
. bfd_arch_i860, {* Intel 860 *}
@@ -164,8 +164,8 @@ DESCRIPTION
.#define bfd_mach_h8300s 3
. bfd_arch_pdp11, {* DEC PDP-11 *}
. bfd_arch_powerpc, {* PowerPC *}
-.#define bfd_mach_ppc 0
-.#define bfd_mach_ppc64 1
+.#define bfd_mach_ppc 32
+.#define bfd_mach_ppc64 64
.#define bfd_mach_ppc_403 403
.#define bfd_mach_ppc_403gc 4030
.#define bfd_mach_ppc_505 505
@@ -184,13 +184,13 @@ DESCRIPTION
.#define bfd_mach_ppc_7400 7400
.#define bfd_mach_ppc_e500 500
. bfd_arch_rs6000, {* IBM RS/6000 *}
-.#define bfd_mach_rs6k 0
+.#define bfd_mach_rs6k 6000
.#define bfd_mach_rs6k_rs1 6001
.#define bfd_mach_rs6k_rsc 6003
.#define bfd_mach_rs6k_rs2 6002
. bfd_arch_hppa, {* HP PA RISC *}
. bfd_arch_d10v, {* Mitsubishi D10V *}
-.#define bfd_mach_d10v 0
+.#define bfd_mach_d10v 1
.#define bfd_mach_d10v_ts2 2
.#define bfd_mach_d10v_ts3 3
. bfd_arch_d30v, {* Mitsubishi D30V *}
@@ -202,7 +202,7 @@ DESCRIPTION
.#define bfd_mach_z8002 2
. bfd_arch_h8500, {* Hitachi H8/500 *}
. bfd_arch_sh, {* Hitachi SH *}
-.#define bfd_mach_sh 0
+.#define bfd_mach_sh 1
.#define bfd_mach_sh2 0x20
.#define bfd_mach_sh_dsp 0x2d
.#define bfd_mach_sh3 0x30
@@ -234,16 +234,16 @@ DESCRIPTION
. bfd_arch_tic54x, {* Texas Instruments TMS320C54X *}
. bfd_arch_tic80, {* TI TMS320c80 (MVP) *}
. bfd_arch_v850, {* NEC V850 *}
-.#define bfd_mach_v850 0
+.#define bfd_mach_v850 1
.#define bfd_mach_v850e 'E'
.#define bfd_mach_v850ea 'A'
. bfd_arch_arc, {* ARC Cores *}
-.#define bfd_mach_arc_5 0
-.#define bfd_mach_arc_6 1
-.#define bfd_mach_arc_7 2
-.#define bfd_mach_arc_8 3
+.#define bfd_mach_arc_5 5
+.#define bfd_mach_arc_6 6
+.#define bfd_mach_arc_7 7
+.#define bfd_mach_arc_8 8
. bfd_arch_m32r, {* Mitsubishi M32R/D *}
-.#define bfd_mach_m32r 0 {* For backwards compatibility. *}
+.#define bfd_mach_m32r 1 {* For backwards compatibility. *}
.#define bfd_mach_m32rx 'x'
. bfd_arch_mn10200, {* Matsushita MN10200 *}
. bfd_arch_mn10300, {* Matsushita MN10300 *}
@@ -252,19 +252,19 @@ DESCRIPTION
. bfd_arch_fr30,
.#define bfd_mach_fr30 0x46523330
. bfd_arch_frv,
-.#define bfd_mach_frv 0
-.#define bfd_mach_frvsimple 1
+.#define bfd_mach_frv 1
+.#define bfd_mach_frvsimple 2
.#define bfd_mach_fr300 300
.#define bfd_mach_fr400 400
.#define bfd_mach_frvtomcat 499 {* fr500 prototype *}
.#define bfd_mach_fr500 500
. bfd_arch_mcore,
. bfd_arch_ia64, {* HP/Intel ia64 *}
-.#define bfd_mach_ia64_elf64 0
-.#define bfd_mach_ia64_elf32 1
+.#define bfd_mach_ia64_elf64 64
+.#define bfd_mach_ia64_elf32 32
. bfd_arch_ip2k, {* Ubicom IP2K microcontrollers. *}
-.#define bfd_mach_ip2022 0
-.#define bfd_mach_ip2022ext 1
+.#define bfd_mach_ip2022 1
+.#define bfd_mach_ip2022ext 2
. bfd_arch_pj,
. bfd_arch_avr, {* Atmel AVR microcontrollers. *}
.#define bfd_mach_avr1 1
@@ -274,12 +274,12 @@ DESCRIPTION
.#define bfd_mach_avr5 5
. bfd_arch_cris, {* Axis CRIS *}
. bfd_arch_s390, {* IBM s390 *}
-.#define bfd_mach_s390_31 0
-.#define bfd_mach_s390_64 1
+.#define bfd_mach_s390_31 31
+.#define bfd_mach_s390_64 64
. bfd_arch_openrisc, {* OpenRISC *}
. bfd_arch_mmix, {* Donald Knuth's educational processor. *}
. bfd_arch_xstormy16,
-.#define bfd_mach_xstormy16 0
+.#define bfd_mach_xstormy16 1
. bfd_arch_last
. };
*/
Index: bfd/cpu-avr.c
===================================================================
RCS file: /cvs/src/src/bfd/cpu-avr.c,v
retrieving revision 1.4
diff -u -p -r1.4 cpu-avr.c
--- bfd/cpu-avr.c 8 Mar 2001 21:03:57 -0000 1.4
+++ bfd/cpu-avr.c 29 Aug 2002 02:48:48 -0000
@@ -76,8 +76,8 @@ compatible (a,b)
return NULL;

/* Special case for ATmega[16]03 (avr:3) and ATmega83 (avr:4). */
- if ((a->mach == 3 && b->mach == 4)
- || (a->mach == 4 && b->mach == 3))
+ if ((a->mach == bfd_mach_avr3 && b->mach == bfd_mach_avr4)
+ || (a->mach == bfd_mach_avr4 && b->mach == bfd_mach_avr3))
return NULL;

/* So far all newer AVR architecture cores are supersets of previous
Index: bfd/cpu-powerpc.c
===================================================================
RCS file: /cvs/src/src/bfd/cpu-powerpc.c,v
retrieving revision 1.11
diff -u -p -r1.11 cpu-powerpc.c
--- bfd/cpu-powerpc.c 19 Aug 2002 21:12:34 -0000 1.11
+++ bfd/cpu-powerpc.c 29 Aug 2002 02:48:48 -0000
@@ -41,7 +41,7 @@ powerpc_compatible (a,b)
case bfd_arch_powerpc:
return bfd_default_compatible (a, b);
case bfd_arch_rs6000:
- if (a->mach == 0)
+ if (a->mach == bfd_mach_ppc)
return a;
return NULL;
}
Index: bfd/cpu-rs6000.c
===================================================================
RCS file: /cvs/src/src/bfd/cpu-rs6000.c,v
retrieving revision 1.3
diff -u -p -r1.3 cpu-rs6000.c
--- bfd/cpu-rs6000.c 8 Mar 2001 21:03:58 -0000 1.3
+++ bfd/cpu-rs6000.c 29 Aug 2002 02:48:48 -0000
@@ -46,7 +46,7 @@ rs6000_compatible (a,b)
case bfd_arch_rs6000:
return bfd_default_compatible (a, b);
case bfd_arch_powerpc:
- if (b->mach == 0)
+ if (b->mach == bfd_mach_rs6k)
return b;
return NULL;
}
Index: opcodes/mips-dis.c
===================================================================
RCS file: /cvs/src/src/opcodes/mips-dis.c,v
retrieving revision 1.31
diff -u -p -r1.31 mips-dis.c
--- opcodes/mips-dis.c 9 Jul 2002 14:21:40 -0000 1.31
+++ opcodes/mips-dis.c 29 Aug 2002 02:54:05 -0000
@@ -595,7 +595,7 @@ _print_insn_mips (memaddr, info, endiann
#endif

#if SYMTAB_AVAILABLE
- if (info->mach == 16
+ if (info->mach == bfd_mach_mips16
|| (info->flavour == bfd_target_elf_flavour
&& info->symbols != NULL
&& ((*(elf_symbol_type **) info->symbols)->internal_elf_sym.st_other
Index: gdb/x86-64-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/x86-64-tdep.c,v
retrieving revision 1.26
diff -u -p -r1.26 x86-64-tdep.c
--- gdb/x86-64-tdep.c 24 Aug 2002 00:21:35 -0000 1.26
+++ gdb/x86-64-tdep.c 29 Aug 2002 02:49:08 -0000
@@ -1144,7 +1144,8 @@ _initialize_x86_64_tdep (void)
}

tm_print_insn = gdb_print_insn_x86_64;
- tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 3)->mach;
+ tm_print_insn_info.mach
+ = bfd_lookup_arch (bfd_arch_i386, bfd_mach_x86_64)->mach;

/* Add the variable that controls the disassembly flavour. */
{
Index: ld/emulparams/elf32ppc.sh
===================================================================
RCS file: /cvs/src/src/ld/emulparams/elf32ppc.sh,v
retrieving revision 1.6
diff -u -p -r1.6 elf32ppc.sh
--- ld/emulparams/elf32ppc.sh 22 May 2002 08:44:52 -0000 1.6
+++ ld/emulparams/elf32ppc.sh 29 Aug 2002 01:14:55 -0000
@@ -7,7 +7,7 @@ SCRIPT_NAME=elf
OUTPUT_FORMAT="elf32-powerpc"
TEXT_START_ADDR=0x01800000
MAXPAGESIZE=0x10000
-ARCH=powerpc
+ARCH=powerpc:common
MACHINE=
BSS_PLT=
EXECUTABLE_SYMBOLS='PROVIDE (__stack = 0); PROVIDE (___stack = 0);'

--
Alan Modra
IBM OzLabs - Linux Technology Centre