From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 28955 invoked by alias); 9 May 2002 16:48:08 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 28945 invoked from network); 9 May 2002 16:48:06 -0000 Received: from unknown (HELO tetsuo.nj.caldera.com) (63.124.204.226) by sources.redhat.com with SMTP; 9 May 2002 16:48:06 -0000 Received: from caldera.com (localhost.localdomain [127.0.0.1]) by tetsuo.nj.caldera.com (8.11.6/8.11.6) with ESMTP id g49H0Ac05426; Thu, 9 May 2002 13:00:10 -0400 Message-ID: <3CDAAB19.4780AA1F@caldera.com> Date: Thu, 09 May 2002 09:48:00 -0000 From: Petr Sorfa Organization: Caldera X-Accept-Language: en MIME-Version: 1.0 To: "gdb-patches@sources.redhat.com" Subject: [PATCH] IA64 fix for breakpoints on L in MLX instruction bundles Content-Type: multipart/mixed; boundary="------------BE237C5DBE70CC9212012681" X-SW-Source: 2002-05/txt/msg00277.txt.bz2 This is a multi-part message in MIME format. --------------BE237C5DBE70CC9212012681 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Content-length: 317 Hi, Patch for handling breakpoints on the L instruction type in an MLX bundle. 2002-05-09 Petr Sorfa (petrs@caldera.com) * ia64-tdep.c: Handle breakpoints on L instruction type in MLX instruction bundle by moving the breakpoint to the third slot (X instruction type) as L holds only data. --------------BE237C5DBE70CC9212012681 Content-Type: text/plain; charset=us-ascii; name="ia64-tdep.c.patch" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="ia64-tdep.c.patch" Content-length: 1829 Index: ia64-tdep.c =================================================================== RCS file: /cvs/src/src/gdb/ia64-tdep.c,v retrieving revision 1.29 diff -c -p -r1.29 ia64-tdep.c *** ia64-tdep.c 18 Apr 2002 18:09:01 -0000 1.29 --- ia64-tdep.c 9 May 2002 16:39:27 -0000 *************** ia64_memory_insert_breakpoint (CORE_ADDR *** 564,569 **** --- 564,570 ---- int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER; long long instr; int val; + int template; if (slotnum > 2) error("Can't insert breakpoint for slot numbers greater than 2."); *************** ia64_memory_insert_breakpoint (CORE_ADDR *** 571,576 **** --- 572,586 ---- addr &= ~0x0f; val = target_read_memory (addr, bundle, BUNDLE_LEN); + + /* Check for L type instruction in 2nd slot, if present then + bump up the slot number to the 3rd slot */ + template = extract_bit_field (bundle, 0, 5); + if (slotnum == 1 && template_encoding_table[template][1] == L) + { + slotnum = 2; + } + instr = slotN_contents (bundle, slotnum); memcpy(contents_cache, &instr, sizeof(instr)); replace_slotN_contents (bundle, BREAKPOINT, slotnum); *************** ia64_memory_remove_breakpoint (CORE_ADDR *** 587,596 **** --- 597,616 ---- int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER; long long instr; int val; + int template; addr &= ~0x0f; val = target_read_memory (addr, bundle, BUNDLE_LEN); + + /* Check for L type instruction in 2nd slot, if present then + bump up the slot number to the 3rd slot */ + template = extract_bit_field (bundle, 0, 5); + if (slotnum == 1 && template_encoding_table[template][1] == L) + { + slotnum = 2; + } + memcpy (&instr, contents_cache, sizeof instr); replace_slotN_contents (bundle, instr, slotnum); if (val == 0) --------------BE237C5DBE70CC9212012681--