From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 6752 invoked by alias); 18 Apr 2017 22:19:46 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 6738 invoked by uid 89); 18 Apr 2017 22:19:45 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.4 required=5.0 tests=AWL,BAYES_00,SPF_HELO_PASS,SPF_SOFTFAIL autolearn=no version=3.3.2 spammy=stock X-HELO: mail.baldwin.cx Received: from bigwig.baldwin.cx (HELO mail.baldwin.cx) (96.47.65.170) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 18 Apr 2017 22:19:44 +0000 Received: from ralph.baldwin.cx (c-73-231-226-104.hsd1.ca.comcast.net [73.231.226.104]) by mail.baldwin.cx (Postfix) with ESMTPSA id C176910A7DB; Tue, 18 Apr 2017 18:19:43 -0400 (EDT) From: John Baldwin To: gdb-patches@sourceware.org Cc: "Maciej W. Rozycki" , Luis Machado Subject: Re: [PATCH 4/4] Don't throw an error in 'info registers' for unavailable MIPS GP registers. Date: Tue, 18 Apr 2017 22:19:00 -0000 Message-ID: <3860196.vBEQgn8TUC@ralph.baldwin.cx> User-Agent: KMail/4.14.10 (FreeBSD/11.0-STABLE; KDE/4.14.10; amd64; ; ) In-Reply-To: References: <20170412183727.22483-1-jhb@FreeBSD.org> <17215390.QnBQOcfjcL@ralph.baldwin.cx> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-IsSubscribed: yes X-SW-Source: 2017-04/txt/msg00538.txt.bz2 On Tuesday, April 18, 2017 10:33:28 PM Maciej W. Rozycki wrote: > On Mon, 17 Apr 2017, John Baldwin wrote: > > > > That needs to be fixed then. Previously there was no need to handle FIR > > > specially. Overall we need to handle configurations without FPU as well. > > > > That might be true, but that is a larger patch (and it doesn't help with my > > kernel target case where only a subset of GPRs are valid). > > Minimising changes is not our goal though, unlike making them correct. > And I think we need to tell apart a situation where a register (FIR) is > invalid according to the OS ABI and where a subset of registers may not > always be accessible. For FreeBSD/mips in particular I will probably fix the FIR issue by fixing FreeBSD to export FIR. That said, 'info registers' on other architectures is consistent in that they do not throw an error for an unavailable register but annotate it as such. The goal of this patch was to align MIPS with other architectures in terms of that behavior. Other architectures also permit registers to be unavailable without requiring a custom target description FWIW (e.g. the segment registers on x86 are effectively "optional" and not always supplied by a target). > > > I'm somewhat put off by the truncated message in the 32-bit case though > > > -- unless a better proposition comes up, then how about using `xxxxxxxx' > > > and `xxxxxxxxxxxxxxxx' for the 32-bit and 64-bit case respectively as with > > > some previous effort? What do other target backends do? > > > > I don't disagree with the 32-bit format and am certainly open to other > > options. Other architectures don't generally use a table and use the full > > "" string, e.g. on a FreeBSD 64-bit x86 kernel (which uses the > > "stock" method to print registers rather than a gdbarch-specific one): > > > > (kgdb) info registers > > rax > > rbx 0xfffff800085cb500 -8795952728832 > > rcx > > rdx > > rsi > > rdi > > rbp 0xfffffe04674819c0 0xfffffe04674819c0 > > rsp 0xfffffe0467481968 0xfffffe0467481968 > > r8 > > r9 > > r10 > > r11 > > r12 0xffffffff80d43b00 -2133574912 > > r13 0xfffff801fb2f3000 -8787583881216 > > r14 0x0 0 > > r15 0xffffffff80d43b00 -2133574912 > > rip 0xffffffff8058bb12 0xffffffff8058bb12 > > eflags > > cs 0x20 32 > > ss 0x28 40 > > ds > > es > > fs > > gs > > Thanks for checking that. NB I find output above quite messy, especially > the lack of column alignment, e.g. `r14' vs `r15'. It makes it hard to > read for me. I don't disagree with the note on alignment. That is probably worth fixing in a separate change. > I've given your proposal some thought and I'm of mixed minds between two > possibilites I have come up with for the condensed format, specifically > `xxxxxxxx' vs `', which I think are both suitable without being > messy: > > [snip] > > The use of angle brackets with the latter variant is consistent with other > targets, so I might have just a slight preference for it, but I'll be > happy to accept input from other people. I like and prefer it for similar reasons (consistency). > Where space is at disposal full `' could be printed, e.g: > > (gdb) info registers s3 s4 s5 > s3: > s4: > s5: 0x4f0000 > (gdb) > > or: > > (gdb) info registers > zero at v0 v1 > R0 0000000000000000 fffffffffffffff0 ffffffffc0000000 > a0 a1 a2 a3 > R4 0000000000000001 000000fffffffbb8 000000fffffffbc8 > a4 a5 a6 a7 > R8 0000000000000000 8101010101010100 2f2f2f2f2f2f2f2f > t0 t1 t2 t3 > R12 0000000000000000 0000000000000001 ffffffff8122f5d8 > s0 s1 s2 s3 > R16 000000fff8006000 0000000120000970 000000fff8006000 0000000000500000 > s4 s5 s6 s7 > R20 0000000000521ec8 0000000000522608 0000000000000000 0000000000000000 > t8 t9 k0 k1 > R24 000000000000161a 0000000120000970 0000000000000000 0000000000000000 > gp sp s8 ra > R28 000000fff8006000 000000fffffffbb0 0000000000000000 > status lo hi badvaddr > 0000000000109cf3 000000000d35ec75 0000000000000000 > cause pc > 0000000000800024 0000000120000970 > fcsr fir restart > 00000000 00f30000 0000000000000000 > (gdb) > > Comments? Thoughts? I'm generally fine with using in the 32-bit table and otherwise. I can rework the patch to do that and come back with a V2. -- John Baldwin