From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 20117 invoked by alias); 3 Jun 2011 07:44:58 -0000 Received: (qmail 20106 invoked by uid 22791); 3 Jun 2011 07:44:56 -0000 X-SWARE-Spam-Status: No, hits=0.5 required=5.0 tests=AWL,BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,RFC_ABUSE_POST,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from nm8-vm3.bullet.mail.ne1.yahoo.com (HELO nm8-vm3.bullet.mail.ne1.yahoo.com) (98.138.91.138) by sourceware.org (qpsmtpd/0.43rc1) with SMTP; Fri, 03 Jun 2011 07:44:42 +0000 Received: from [98.138.90.53] by nm8.bullet.mail.ne1.yahoo.com with NNFMP; 03 Jun 2011 07:44:41 -0000 Received: from [98.138.89.198] by tm6.bullet.mail.ne1.yahoo.com with NNFMP; 03 Jun 2011 07:44:41 -0000 Received: from [127.0.0.1] by omp1056.mail.ne1.yahoo.com with NNFMP; 03 Jun 2011 07:44:41 -0000 Received: (qmail 13851 invoked by uid 60001); 3 Jun 2011 07:44:40 -0000 Message-ID: <378274.81405.qm@web112507.mail.gq1.yahoo.com> Received: from [115.99.18.98] by web112507.mail.gq1.yahoo.com via HTTP; Fri, 03 Jun 2011 00:44:40 PDT References: <998639.46560.qm@web112516.mail.gq1.yahoo.com> Date: Fri, 03 Jun 2011 07:44:00 -0000 From: paawan oza Subject: Re: [PATCH] arm reversible : To: Tom Tromey Cc: gdb-patches@sourceware.org, =?iso-8859-1?Q?Petr_Hluz=EDn?= In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: quoted-printable Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2011-06/txt/msg00046.txt.bz2 Hi Tom, please find my comments inlined below. Regards, Oza. ----- Original Message ---- From: Tom Tromey To: paawan oza Cc: gdb-patches@sourceware.org; Petr Hluz=EDn Sent: Tue, May 31, 2011 11:34:49 PM Subject: Re: [PATCH] arm reversible : >>>>> "Oza" =3D=3D paawan oza writes: Oza> Fixed some minor issues with Patch. Thanks. Overall I think the basic structure is probably ok. I'd appreciate it if an actual ARM person took a look. Oza> +#define GET_REG_VAL(REGCACHE,NO,VAL) \ Oza> + regcache_raw_read_unsigned (REGCACHE, NO, VAL); Oza> + Oza> +#define GET_REG_VAL_SIGNED(REGCACHE,NO,VAL) \ Oza> + regcache_raw_read_unsigned (REGCACHE, NO, VAL); I think it is better not to have these macros. They don't add anything, but just obscure the underlying implementation. I don't understand why the "SIGNED" macro is defined as calling a function named ..._unsigned. Oza: macors removed and it was a mistake to have unsigned, corrected too. Oza> +#define REG_ALLOC(REGS,LENGTH,RECORD_BUF) \ Oza> +do \ Oza> + { \ Oza> + unsigned int reg_len =3D 0; \ Oza> + reg_len =3D LENGTH; \ You might as well coalesce these two lines. Oza: done Oza> + if (reg_len) \ Oza> + { \ Oza> + REGS =3D (uint32_t*) xmalloc (sizeof(uint32_t) * (reg_len)); \ Oza> + while (reg_len) \ Oza> + { \ Oza> + REGS[reg_len - 1] =3D RECORD_BUF[reg_len - 1]; \ Oza> + reg_len--; \ I think this could be replaced with memcpy. Oza: yes, but just to make the logic look symmetrical with MEM_ALLOC I have= kept=20 that way. Oza> +struct arm_mem_r Oza> +{ Oza> + uint32_t len; /* record length. */ Wrong indentation. Oza: corrected. Oza> +/* ARM instruction record.=20=20 Oza> +contains opcode of current insn and execution state (before entry to= =20 Oza> +decode_insn() ),=20 Oza> +contains list of to-be-modified registers and memory blocks (on retur= n=20 from=20 Oza> +decode_insn() ). */ Wrong formatting. Oza: corrected. Oza> +/* checks ARM SBZ and SBO mendatory fields. */ Capitalize. This problem appears more than once. Oza: Capitalization is taken care in all the comments now. Oza> + memset(&u_buf, 0, sizeof(u_buf)); Wrong formatting. This appears a few times too. Oza: sizeof (...) formatting correctedin memset, I am not sure if any oth= er=20 formatting you referred to. Oza> + printf_unfiltered (_("Process record does not support=20 instruction " Oza> + "0x%0x at address %s.\n"), Oza> + arm_insn_r->arm_insn, Oza> + paddress (arm_insn_r->gdbarch,=20 It seems odd that a failure is reported just with a printf. What is the reason for not throwing an exception? Oza : If you see next line ret =3D -1 eventullly gdb record code throws an exception as below. if (ret < 0) error (_("Process record: failed to record execution log.")); Oza> + gdb_assert_not_reached ("no decoding pattern found"); This text makes it sound like this assertion could possibly be reached somehow. I didn't track through all the insn decoding logic; but if this can be triggered by some value (perhaps an invalid instruction) then it is extremely unfriendly to assert. Oza: this code would never be reached, except in the case where ARM changes= /adds=20 decoding logic to this set of insns. or compiler is producing faulty code. both have rare chances. basically I was looking for throwing assertion with message, and could not = find=20 macro other than this. please suggest if any better way to handle. Oza> + struct Oza> + { Oza> + ULONGEST signed_word; It is weird that a "signed" word has an unsigned type. Why is this? oza: turned into LONGEST, corrected now. Oza> + /* Oza: FIX ME ? what if user hit breakpoint and type reverse,= in=20 Oza> + that case, we need to go back with previous CPSR and=20 Oza> + Program Counter.. */ No names in comments. Oza: sure, removed.=20 execuse me if you have to tell things twice as it is quite a long code base= =20 where i might have failed to take care of same error at all places. though I tried best to eliminate duplicate errors. Tom