From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cagney To: gdb-patches@cygnus.com Cc: robertl@sco.com, Stan Shebs Subject: Re: GDB 4.18 on SVR5: missed it by a hair Date: Mon, 19 Apr 1999 18:13:00 -0000 Message-id: <371BD4C8.D78BDC37@cygnus.com> References: <19990415225503.A10488@rjlhome.sco.com> <199904192047.NAA18881.cygnus.patches.gdb@andros.cygnus.com> X-SW-Source: 1999-q2/msg00041.html Stan Shebs wrote: > > > Argh! The change is in the trunk, but I forget to add it to the 4.18 > branch also. Well, there's a third patch for 4.18.1... > Would it be useful to cut a 4.18 branch in our shiny new CVS repository and commit the 4.18.1 patches there? enjoy, Andrew From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cagney To: gdb-patches@cygnus.com Cc: robertl@sco.com, Stan Shebs Subject: Re: GDB 4.18 on SVR5: missed it by a hair Date: Mon, 19 Apr 1999 19:10:00 -0000 Message-ID: <371BD4C8.D78BDC37@cygnus.com> References: <19990415225503.A10488@rjlhome.sco.com> <199904192047.NAA18881.cygnus.patches.gdb@andros.cygnus.com> X-SW-Source: 1999-04/msg00041.html Message-ID: <19990419191000.IlpllnswF4N-QiAXvoOXAPNaAzpIDMR7_Hwjy7HbgX0@z> Stan Shebs wrote: > > > Argh! The change is in the trunk, but I forget to add it to the 4.18 > branch also. Well, there's a third patch for 4.18.1... > Would it be useful to cut a 4.18 branch in our shiny new CVS repository and commit the 4.18.1 patches there? enjoy, Andrew >From tm@netcom.com Fri Apr 23 15:31:00 1999 From: Toshiyasu Morita To: gdb-patches@cygnus.com Subject: sh-stub.c cleanup patch Date: Fri, 23 Apr 1999 15:31:00 -0000 Message-id: <199904232139.OAA20184@netcom8.netcom.com> X-SW-Source: 1999-04/msg00042.html Content-length: 25864 This is a cleanup patch before I add support for the SH4. It mostly localizes processor dependencies at the end of the file. Toshi Fri Apr 23 13:27:34 PDT 1999 Toshiyasu Morita (tm@netcom.com) * sh-stub.c: Mostly localize processor dependencies. *** sh-stub.c.bak Fri Apr 23 12:40:50 1999 --- sh-stub.c Fri Apr 23 13:19:55 1999 *************** *** 1,8 **** ! /* sh-stub.c -- debugging stub for the Hitachi-SH. NOTE!! This code has to be compiled with optimization, otherwise the function inlining which generates the exception handlers won't work. ! */ /* This is originally based on an m68k software stub written by Glenn --- 1,8 ---- ! /* sh-stub.c -- debugging stub for the Hitachi-SH. NOTE!! This code has to be compiled with optimization, otherwise the function inlining which generates the exception handlers won't work. ! */ /* This is originally based on an m68k software stub written by Glenn *************** *** 147,179 **** #include #include ! #define COND_BR_MASK 0xff00 ! #define UCOND_DBR_MASK 0xe000 ! #define UCOND_RBR_MASK 0xf0df ! #define TRAPA_MASK 0xff00 ! ! #define COND_DISP 0x00ff ! #define UCOND_DISP 0x0fff ! #define UCOND_REG 0x0f00 ! ! #define BF_INSTR 0x8b00 ! #define BT_INSTR 0x8900 ! #define BRA_INSTR 0xa000 ! #define BSR_INSTR 0xb000 ! #define JMP_INSTR 0x402b ! #define JSR_INSTR 0x400b ! #define RTS_INSTR 0x000b ! #define RTE_INSTR 0x002b ! #define TRAPA_INSTR 0xc300 ! #define SSTEP_INSTR 0xc3ff - #define T_BIT_MASK 0x0001 /* * BUFMAX defines the maximum number of characters in inbound/outbound ! * buffers at least NUMREGBYTES*2 are needed for register packets */ #define BUFMAX 1024 --- 147,183 ---- #include #include + /* Hitachi SH architecture instruction encoding masks */ + #define COND_BR_MASK 0xff00 + #define UCOND_DBR_MASK 0xe000 + #define UCOND_RBR_MASK 0xf0df + #define TRAPA_MASK 0xff00 + + #define COND_DISP 0x00ff + #define UCOND_DISP 0x0fff + #define UCOND_REG 0x0f00 + + /* Hitachi SH instruction opcodes */ + + #define BF_INSTR 0x8b00 + #define BT_INSTR 0x8900 + #define BRA_INSTR 0xa000 + #define BSR_INSTR 0xb000 + #define JMP_INSTR 0x402b + #define JSR_INSTR 0x400b + #define RTS_INSTR 0x000b + #define RTE_INSTR 0x002b + #define TRAPA_INSTR 0xc300 + #define SSTEP_INSTR 0xc3ff ! /* Hitachi SH processor register masks */ ! #define T_BIT_MASK 0x0001 /* * BUFMAX defines the maximum number of characters in inbound/outbound ! * buffers. At least NUMREGBYTES*2 are needed for register packets. */ #define BUFMAX 1024 *************** void breakpoint (void); *** 229,251 **** int init_stack[init_stack_size] __attribute__ ((section ("stack"))) = {0}; int stub_stack[stub_stack_size] __attribute__ ((section ("stack"))) = {0}; - typedef struct - { - void (*func_cold) (); - int *stack_cold; - void (*func_warm) (); - int *stack_warm; - void (*(handler[256 - 4])) (); - } - vec_type; - void INIT (); void BINIT (); - /* When you link take care that this is at address 0 - - or wherever your vbr points */ - #define CPU_BUS_ERROR_VEC 9 #define DMA_BUS_ERROR_VEC 10 #define NMI_VEC 11 --- 233,242 ---- *************** void BINIT (); *** 256,525 **** #define USER_VEC 255 - #define BCR (*(volatile short *)(0x05FFFFA0)) /* Bus control register */ - #define BAS (0x800) /* Byte access select */ - #define WCR1 (*(volatile short *)(0x05ffffA2)) /* Wait state control register */ - - const vec_type vectable = - { - &BINIT, /* 0: Power-on reset PC */ - init_stack + init_stack_size, /* 1: Power-on reset SP */ - &BINIT, /* 2: Manual reset PC */ - init_stack + init_stack_size, /* 3: Manual reset SP */ - { - &catch_exception_4, /* 4: General invalid instruction */ - &catch_exception_random, /* 5: Reserved for system */ - &catch_exception_6, /* 6: Invalid slot instruction */ - &catch_exception_random, /* 7: Reserved for system */ - &catch_exception_random, /* 8: Reserved for system */ - &catch_exception_9, /* 9: CPU bus error */ - &catch_exception_10, /* 10: DMA bus error */ - &catch_exception_11, /* 11: NMI */ - &catch_exception_random, /* 12: User break */ - &catch_exception_random, /* 13: Reserved for system */ - &catch_exception_random, /* 14: Reserved for system */ - &catch_exception_random, /* 15: Reserved for system */ - &catch_exception_random, /* 16: Reserved for system */ - &catch_exception_random, /* 17: Reserved for system */ - &catch_exception_random, /* 18: Reserved for system */ - &catch_exception_random, /* 19: Reserved for system */ - &catch_exception_random, /* 20: Reserved for system */ - &catch_exception_random, /* 21: Reserved for system */ - &catch_exception_random, /* 22: Reserved for system */ - &catch_exception_random, /* 23: Reserved for system */ - &catch_exception_random, /* 24: Reserved for system */ - &catch_exception_random, /* 25: Reserved for system */ - &catch_exception_random, /* 26: Reserved for system */ - &catch_exception_random, /* 27: Reserved for system */ - &catch_exception_random, /* 28: Reserved for system */ - &catch_exception_random, /* 29: Reserved for system */ - &catch_exception_random, /* 30: Reserved for system */ - &catch_exception_random, /* 31: Reserved for system */ - &catch_exception_32, /* 32: Trap instr (user vectors) */ - &catch_exception_33, /* 33: Trap instr (user vectors) */ - &catch_exception_random, /* 34: Trap instr (user vectors) */ - &catch_exception_random, /* 35: Trap instr (user vectors) */ - &catch_exception_random, /* 36: Trap instr (user vectors) */ - &catch_exception_random, /* 37: Trap instr (user vectors) */ - &catch_exception_random, /* 38: Trap instr (user vectors) */ - &catch_exception_random, /* 39: Trap instr (user vectors) */ - &catch_exception_random, /* 40: Trap instr (user vectors) */ - &catch_exception_random, /* 41: Trap instr (user vectors) */ - &catch_exception_random, /* 42: Trap instr (user vectors) */ - &catch_exception_random, /* 43: Trap instr (user vectors) */ - &catch_exception_random, /* 44: Trap instr (user vectors) */ - &catch_exception_random, /* 45: Trap instr (user vectors) */ - &catch_exception_random, /* 46: Trap instr (user vectors) */ - &catch_exception_random, /* 47: Trap instr (user vectors) */ - &catch_exception_random, /* 48: Trap instr (user vectors) */ - &catch_exception_random, /* 49: Trap instr (user vectors) */ - &catch_exception_random, /* 50: Trap instr (user vectors) */ - &catch_exception_random, /* 51: Trap instr (user vectors) */ - &catch_exception_random, /* 52: Trap instr (user vectors) */ - &catch_exception_random, /* 53: Trap instr (user vectors) */ - &catch_exception_random, /* 54: Trap instr (user vectors) */ - &catch_exception_random, /* 55: Trap instr (user vectors) */ - &catch_exception_random, /* 56: Trap instr (user vectors) */ - &catch_exception_random, /* 57: Trap instr (user vectors) */ - &catch_exception_random, /* 58: Trap instr (user vectors) */ - &catch_exception_random, /* 59: Trap instr (user vectors) */ - &catch_exception_random, /* 60: Trap instr (user vectors) */ - &catch_exception_random, /* 61: Trap instr (user vectors) */ - &catch_exception_random, /* 62: Trap instr (user vectors) */ - &catch_exception_random, /* 63: Trap instr (user vectors) */ - &catch_exception_random, /* 64: IRQ0 */ - &catch_exception_random, /* 65: IRQ1 */ - &catch_exception_random, /* 66: IRQ2 */ - &catch_exception_random, /* 67: IRQ3 */ - &catch_exception_random, /* 68: IRQ4 */ - &catch_exception_random, /* 69: IRQ5 */ - &catch_exception_random, /* 70: IRQ6 */ - &catch_exception_random, /* 71: IRQ7 */ - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_random, - &catch_exception_255}}; - char in_nmi; /* Set when handling an NMI, so we don't reenter */ int dofault; /* Non zero, bus errors will raise exception */ --- 247,252 ---- *************** gdb_mode() *** 1080,1090 **** otherwise as a quick means to stop program execution and "break" into the debugger. */ ! void ! breakpoint (void) ! { ! BREAKPOINT (); ! } asm ("_BINIT: mov.l L1,r15"); asm ("bra _INIT"); --- 807,1117 ---- otherwise as a quick means to stop program execution and "break" into the debugger. */ ! void ! breakpoint (void) ! { ! BREAKPOINT (); ! } ! ! /**** Processor-specific routines start here ****/ ! /**** Processor-specific routines start here ****/ ! /**** Processor-specific routines start here ****/ ! ! /* Note: ! ! The Hitachi SH family uses two exception architectures: ! ! SH1 & SH2: ! ! These processors utilize an exception vector table. ! Exceptions are vectored to the address stored at VBR + (exception_num * 4) ! ! SH3, SH3E, & SH4: ! ! These processors have fixed entry points relative to the VBR for ! various exception classes. ! */ ! ! #if defined(__sh1__) || defined(__sh2__) ! ! /* SH1/SH2 exception vector table format */ ! ! typedef struct ! { ! void (*func_cold) (); ! int *stack_cold; ! void (*func_warm) (); ! int *stack_warm; ! void (*(handler[256 - 4])) (); ! } ! vec_type; ! ! /* vectable is the SH1/SH2 vector table. It must be at address 0 ! or wherever your vbr points. */ ! ! const vec_type vectable = ! { ! &BINIT, /* 0: Power-on reset PC */ ! init_stack + init_stack_size, /* 1: Power-on reset SP */ ! &BINIT, /* 2: Manual reset PC */ ! init_stack + init_stack_size, /* 3: Manual reset SP */ ! { ! &catch_exception_4, /* 4: General invalid instruction */ ! &catch_exception_random, /* 5: Reserved for system */ ! &catch_exception_6, /* 6: Invalid slot instruction */ ! &catch_exception_random, /* 7: Reserved for system */ ! &catch_exception_random, /* 8: Reserved for system */ ! &catch_exception_9, /* 9: CPU bus error */ ! &catch_exception_10, /* 10: DMA bus error */ ! &catch_exception_11, /* 11: NMI */ ! &catch_exception_random, /* 12: User break */ ! &catch_exception_random, /* 13: Reserved for system */ ! &catch_exception_random, /* 14: Reserved for system */ ! &catch_exception_random, /* 15: Reserved for system */ ! &catch_exception_random, /* 16: Reserved for system */ ! &catch_exception_random, /* 17: Reserved for system */ ! &catch_exception_random, /* 18: Reserved for system */ ! &catch_exception_random, /* 19: Reserved for system */ ! &catch_exception_random, /* 20: Reserved for system */ ! &catch_exception_random, /* 21: Reserved for system */ ! &catch_exception_random, /* 22: Reserved for system */ ! &catch_exception_random, /* 23: Reserved for system */ ! &catch_exception_random, /* 24: Reserved for system */ ! &catch_exception_random, /* 25: Reserved for system */ ! &catch_exception_random, /* 26: Reserved for system */ ! &catch_exception_random, /* 27: Reserved for system */ ! &catch_exception_random, /* 28: Reserved for system */ ! &catch_exception_random, /* 29: Reserved for system */ ! &catch_exception_random, /* 30: Reserved for system */ ! &catch_exception_random, /* 31: Reserved for system */ ! &catch_exception_32, /* 32: Trap instr (user vectors) */ ! &catch_exception_33, /* 33: Trap instr (user vectors) */ ! &catch_exception_random, /* 34: Trap instr (user vectors) */ ! &catch_exception_random, /* 35: Trap instr (user vectors) */ ! &catch_exception_random, /* 36: Trap instr (user vectors) */ ! &catch_exception_random, /* 37: Trap instr (user vectors) */ ! &catch_exception_random, /* 38: Trap instr (user vectors) */ ! &catch_exception_random, /* 39: Trap instr (user vectors) */ ! &catch_exception_random, /* 40: Trap instr (user vectors) */ ! &catch_exception_random, /* 41: Trap instr (user vectors) */ ! &catch_exception_random, /* 42: Trap instr (user vectors) */ ! &catch_exception_random, /* 43: Trap instr (user vectors) */ ! &catch_exception_random, /* 44: Trap instr (user vectors) */ ! &catch_exception_random, /* 45: Trap instr (user vectors) */ ! &catch_exception_random, /* 46: Trap instr (user vectors) */ ! &catch_exception_random, /* 47: Trap instr (user vectors) */ ! &catch_exception_random, /* 48: Trap instr (user vectors) */ ! &catch_exception_random, /* 49: Trap instr (user vectors) */ ! &catch_exception_random, /* 50: Trap instr (user vectors) */ ! &catch_exception_random, /* 51: Trap instr (user vectors) */ ! &catch_exception_random, /* 52: Trap instr (user vectors) */ ! &catch_exception_random, /* 53: Trap instr (user vectors) */ ! &catch_exception_random, /* 54: Trap instr (user vectors) */ ! &catch_exception_random, /* 55: Trap instr (user vectors) */ ! &catch_exception_random, /* 56: Trap instr (user vectors) */ ! &catch_exception_random, /* 57: Trap instr (user vectors) */ ! &catch_exception_random, /* 58: Trap instr (user vectors) */ ! &catch_exception_random, /* 59: Trap instr (user vectors) */ ! &catch_exception_random, /* 60: Trap instr (user vectors) */ ! &catch_exception_random, /* 61: Trap instr (user vectors) */ ! &catch_exception_random, /* 62: Trap instr (user vectors) */ ! &catch_exception_random, /* 63: Trap instr (user vectors) */ ! &catch_exception_random, /* 64: IRQ0 */ ! &catch_exception_random, /* 65: IRQ1 */ ! &catch_exception_random, /* 66: IRQ2 */ ! &catch_exception_random, /* 67: IRQ3 */ ! &catch_exception_random, /* 68: IRQ4 */ ! &catch_exception_random, /* 69: IRQ5 */ ! &catch_exception_random, /* 70: IRQ6 */ ! &catch_exception_random, /* 71: IRQ7 */ ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_random, ! &catch_exception_255}}; ! ! #define BCR (*(volatile short *)(0x05FFFFA0)) /* Bus control register */ ! #define BAS (0x800) /* Byte access select */ ! #define WCR1 (*(volatile short *)(0x05ffffA2)) /* Wait state control register */ asm ("_BINIT: mov.l L1,r15"); asm ("bra _INIT"); *************** handleError (char theSSR) *** 1551,1553 **** --- 1578,1581 ---- SSR1 &= ~(SCI_ORER | SCI_PER | SCI_FER); } + #endif