From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 8126 invoked by alias); 28 Aug 2014 12:37:29 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 8095 invoked by uid 89); 28 Aug 2014 12:37:28 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,MIME_QP_LONG_LINE,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-pa0-f41.google.com Received: from mail-pa0-f41.google.com (HELO mail-pa0-f41.google.com) (209.85.220.41) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Thu, 28 Aug 2014 12:37:27 +0000 Received: by mail-pa0-f41.google.com with SMTP id lj1so2453482pab.0 for ; Thu, 28 Aug 2014 05:37:25 -0700 (PDT) X-Received: by 10.66.66.2 with SMTP id b2mr5380402pat.65.1409229444423; Thu, 28 Aug 2014 05:37:24 -0700 (PDT) Received: from [192.168.1.35] (76-253-2-104.lightspeed.sntcca.sbcglobal.net. [76.253.2.104]) by mx.google.com with ESMTPSA id hc11sm3448241pbd.70.2014.08.28.05.37.22 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 28 Aug 2014 05:37:22 -0700 (PDT) References: <201408281151.s7SBp3HT006739@d06av02.portsmouth.uk.ibm.com> Mime-Version: 1.0 (1.0) In-Reply-To: <201408281151.s7SBp3HT006739@d06av02.portsmouth.uk.ibm.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: quoted-printable Message-Id: <32E1EB66-445E-476D-97E4-58DC67916808@gmail.com> Cc: "Maciej W. Rozycki" , "gdb-patches@sourceware.org" From: pinskia@gmail.com Subject: Re: [RFC] Use address_from_register in dwarf2-frame.c:read_addr_from_reg Date: Thu, 28 Aug 2014 12:37:00 -0000 To: Ulrich Weigand X-IsSubscribed: yes X-SW-Source: 2014-08/txt/msg00602.txt.bz2 > On Aug 28, 2014, at 4:51 AM, "Ulrich Weigand" wrote: >=20 > Maciej W. Rozycki wrote: >>> On Wed, 27 Aug 2014, Ulrich Weigand wrote: >>> I guess it isn't too hard to support gdbarch_convert_register_p in that >>> routine as well; I just didn't have any target to test on. >>>=20 >>> Can you try whether something along the following lines works for you? >>=20 >> I'll see if I can push it through testing, though it may take a few days= =20 >> as some of MIPS hardware I use (and especially 64-bit one) is slooow (an= d=20 >> I already have a test run under way). >=20 > Thanks! >=20 >> I'd expect the issue to be consistent across all ILP32 64-bit ABIs BTW,= =20 >> that is e.g. x32 x86-64 as well. >=20 > Well, I guess that depends on whether the hardware expects 32-bit pointer > values to be sign-extended when loaded in 64-bit registers or not. I don= 't > think x32 x86-64 requires this sign-extension (but I'm certainly not an > expert here) ... Both x32 and ilpl32 on arrch64 have zero-extended pointers so it should not= be an issue with those two abis, only mips64's n32.=20 Thanks, Andrew >=20 > Bye, > Ulrich >=20 > --=20 > Dr. Ulrich Weigand > GNU/Linux compilers and toolchain > Ulrich.Weigand@de.ibm.com >=20