Re: [PATCH v2 3/4] arc: Add GNU/Linux support for ARC

Simon Marchi
2020-05-14T15:09:09Z

On 2020-04-28 12:04 p.m., Shahab Vahedi via Gdb-patches wrote:
> +/* Implement the "breakpoint_kind_from_pc" gdbarch method. */
> +
> +static int
> +arc_linux_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
> +{
> + return 2;

What is 2?

> +}
> +
> +/* Implement the "sw_breakpoint_from_kind" gdbarch method. */
> +
> +static const gdb_byte *
> +arc_linux_sw_breakpoint_from_kind (struct gdbarch *gdbarch,
> + int kind, int *size)
> +{
> + *size = kind;
> + return ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
> + ? arc_linux_trap_s_be
> + : arc_linux_trap_s_le);
> +}
> +
> +/* Implement the "software_single_step" gdbarch method. */
> +
> +static std::vector<CORE_ADDR>
> +arc_linux_software_single_step (struct regcache *regcache)
> +{
> + struct gdbarch *gdbarch = regcache->arch ();
> + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
> + struct disassemble_info di = arc_disassemble_info (gdbarch);
> +
> + /* Read current instruction. */
> + struct arc_instruction curr_insn;
> + arc_insn_decode (regcache_read_pc (regcache), &di, arc_delayed_print_insn,
> + &curr_insn);
> + CORE_ADDR next_pc = arc_insn_get_linear_next_pc (curr_insn);
> +
> + std::vector<CORE_ADDR> next_pcs;
> +
> + /* For instructions with delay slots, the fall thru is not the
> + instruction immediately after the current instruction, but the one
> + after that. */
> + if (curr_insn.has_delay_slot)
> + {
> + struct arc_instruction next_insn;
> + arc_insn_decode (next_pc, &di, arc_delayed_print_insn, &next_insn);
> + next_pcs.push_back (arc_insn_get_linear_next_pc (next_insn));
> + }
> + else
> + {
> + next_pcs.push_back (next_pc);
> + }

Remove curly braces here.

> +
> + ULONGEST status32;
> + regcache_cooked_read_unsigned (regcache, gdbarch_ps_regnum (gdbarch),
> + &status32);
> +
> + if (curr_insn.is_control_flow)
> + {
> + CORE_ADDR branch_pc = arc_insn_get_branch_target (curr_insn);
> + if (branch_pc != next_pc)
> + next_pcs.push_back (branch_pc);
> + }
> + /* Is current instruction the last in a loop body? */
> + else if (tdep->has_hw_loops)
> + {
> + /* If STATUS32.L is 1, then ZD-loops are disabled. */
> + if ((status32 & ARC_STATUS32_L_MASK) == 0)
> + {
> + ULONGEST lp_end, lp_start, lp_count;
> + regcache_cooked_read_unsigned (regcache, ARC_LP_START_REGNUM,
> + &lp_start);
> + regcache_cooked_read_unsigned (regcache, ARC_LP_END_REGNUM, &lp_end);
> + regcache_cooked_read_unsigned (regcache, ARC_LP_COUNT_REGNUM,
> + &lp_count);
> +
> + if (arc_debug)
> + {
> + debug_printf ("arc-linux: lp_start = %s, lp_end = %s, "
> + "lp_count = %s, next_pc = %s\n",
> + paddress (gdbarch, lp_start),
> + paddress (gdbarch, lp_end),
> + pulongest (lp_count),
> + paddress (gdbarch, next_pc));
> + }
> +
> + if (next_pc == lp_end && lp_count > 1)
> + {
> + /* The instruction is in effect a jump back to the start of
> + the loop. */
> + next_pcs.push_back (lp_start);
> + }
> +
> + }
> + }
> +
> + /* Is this a delay slot? Then next PC is in BTA register. */
> + if ((status32 & ARC_STATUS32_DE_MASK) != 0)
> + {
> + ULONGEST bta;
> + regcache_cooked_read_unsigned (regcache, ARC_BTA_REGNUM, &bta);
> + next_pcs.push_back (bta);
> + }
> +
> + return next_pcs;
> +}
> +
> +/* Implement the "skip_solib_resolver" gdbarch method.
> +
> + See glibc_skip_solib_resolver for details. */
> +
> +static CORE_ADDR
> +arc_linux_skip_solib_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
> +{
> + /* For uClibc 0.9.26+.
> +
> + An unresolved PLT entry points to "__dl_linux_resolve", which calls
> + "_dl_linux_resolver" to do the resolving and then eventually jumps to
> + the function.
> +
> + So we look for the symbol `_dl_linux_resolver', and if we are there,
> + gdb sets a breakpoint at the return address, and continues. */
> + struct bound_minimal_symbol resolver =
> + lookup_minimal_symbol ("_dl_linux_resolver", NULL, NULL);
> +
> + if (arc_debug)
> + {
> + if (resolver.minsym)
> + {
> + CORE_ADDR res_addr = BMSYMBOL_VALUE_ADDRESS (resolver);
> + debug_printf ("arc-linux: skip_solib_resolver (): "
> + "pc = %s, resolver at %s\n",
> + print_core_address (gdbarch, pc),
> + print_core_address (gdbarch, res_addr));
> + }
> + else
> + {
> + debug_printf ("arc-linux: skip_solib_resolver (): "
> + "pc = %s, no resolver found\n",
> + print_core_address (gdbarch, pc));
> + }
> + }
> +
> + if (resolver.minsym && BMSYMBOL_VALUE_ADDRESS (resolver) == pc)
> + {
> + /* Find the return address. */
> + return frame_unwind_caller_pc (get_current_frame ());
> + }
> + else
> + {
> + /* No breakpoint required. */
> + return 0;
> + }
> +}
> +
> +/* Initialization specific to Linux environment. */
> +
> +static void
> +arc_linux_init_osabi (struct gdbarch_info info, struct gdbarch *gdbarch)
> +{
> + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
> +
> + if (arc_debug)
> + debug_printf ("arc-linux: GNU/Linux OS/ABI initialization.\n");
> +
> + /* If we are using Linux, we have in uClibc
> + (libc/sysdeps/linux/arc/bits/setjmp.h):
> +
> + typedef int __jmp_buf[13+1+1+1]; //r13-r25, fp, sp, blink
> +
> + Where "blink" is a stored PC of a caller function.
> + */
> + tdep->jb_pc = 15;

I don't really understand this, could you dumb it down a bit for me?

> +/* Suppress warning from -Wmissing-prototypes. */
> +extern initialize_file_ftype _initialize_arc_linux_tdep;
> +
> +void
> +_initialize_arc_linux_tdep (void)

Remove the void.

Simon