Re: [PATCH] Fix exception unwinding for ARM Cortex-M

Yao Qi
2016-08-02T16:01:08Z

"Fredrik Hederstierna" <fredrik.hederstierna@verisure.com> writes:

Hi Fredrik,
Thanks for splitting the patch.

> diff --git a/gdb/ChangeLog b/gdb/ChangeLog
> index 7820302..2c8573c 100644
> --- a/gdb/ChangeLog
> +++ b/gdb/ChangeLog
> @@ -1,3 +1,7 @@
> +2016-08-02 Fredrik Hederstierna <fredrik.hederstierna@verisure.com>
> +
> + * arm-tdep.c: Fix EXC_RETURN values for ARMv6-M and ARMv7-M.
> +

ChangeLog entry should cover what do you change on the function level.
Please read https://sourceware.org/gdb/wiki/ContributionChecklist

> 2016-08-01 Joel Brobecker <brobecker@adacore.com>
>
> * NEWS: Create a new section for the next release branch.
> diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
> index d2661cb..43436df 100644
> --- a/gdb/arm-tdep.c
> +++ b/gdb/arm-tdep.c
> @@ -469,9 +469,11 @@ static CORE_ADDR
> arm_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR val)
> {
> /* On M-profile devices, do not strip the low bit from EXC_RETURN
> - (the magic exception return address). */
> + (the magic exception return address).
> + According to B1.5.8 of both the ARMv6-M and ARMv7-M Reference Manuals
> + the EXC_RETURN value is 0xF in Bits[31:28]. */
> if (gdbarch_tdep (gdbarch)->is_m
> - && (val & 0xfffffff0) == 0xfffffff0)
> + && (val & 0xf0000000) == 0xf0000000)

Let us do the strict checking. In ARMv7-M manual, the pseudo code of
ExceptionReturn(bits(28) EXC_RETURN) has

if HaveFPExt() then
if !IsOnes(EXC_RETURN<27:5>) then UNPREDICTABLE;
else
if !IsOnes(EXC_RETURN<27:4>) then UNPREDICTABLE;

so let's check "val" should be 0xFFFFFF{E,F}{1,9,D}, or use
arm_m_pc_is_magic too, like,

if (gdbarch_tdep (gdbarch)->is_m
&& arm_m_pc_is_magic (val))
return val;

Do you have FSF copyright assignment? I don't find your record. You
can fill in the form request-assign.future in
https://sourceware.org/gdb/wiki/ContributionChecklist#FSF_copyright_Assignment
then, we can pick up your change.

--
Yao (齐尧)