From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 4914 invoked by alias); 15 May 2002 11:32:13 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 4897 invoked from network); 15 May 2002 11:32:09 -0000 Received: from unknown (HELO harvester.transas.com) (193.125.200.2) by sources.redhat.com with SMTP; 15 May 2002 11:32:09 -0000 Received: from localhost (localhost [127.0.0.1]) by harvester.transas.com (Postfix) with SMTP id 6235F6B824 for ; Wed, 15 May 2002 15:32:07 +0400 (MSD) Received: from clue.transas.com (clue.transas.com [10.0.0.42]) by harvester.transas.com (Postfix) with ESMTP id 1BECE6B823 for ; Wed, 15 May 2002 15:32:07 +0400 (MSD) Received: by clue.transas.com with Internet Mail Service (5.5.2653.19) id ; Wed, 15 May 2002 15:32:07 +0400 Message-ID: <2E74F312D6980D459F3A05492BA40F8DDA4158@clue.transas.com> From: Andrew Volkov To: gdb-patches@sources.redhat.com Subject: [patch/rfc] h8300 Change literal reg numbers to REGNUM macros Date: Wed, 15 May 2002 04:32:00 -0000 MIME-Version: 1.0 Content-Type: text/plain; charset="koi8-r" X-SW-Source: 2002-05/txt/msg00589.txt.bz2 Hi, Attached is a patch to fix literal regnumbers in switches to appropriate macros. Andrey Volkov 2002-05-15 Andrey Volkov * gdb/h8300-tdep.c: Fix literal regnumbers to REGNUMS. * sim/h8300/compile.c: Ditto. * sim/h8300/compile.c: Fix instruction and cycles counting Index: gdb/h8300-tdep.c =================================================================== RCS file: /cvs/src/src/gdb/h8300-tdep.c,v retrieving revision 1.7 diff -u -u -c -p -r1.7 h8300-tdep.c *** gdb/h8300-tdep.c 16 Mar 2001 22:34:45 -0000 1.7 --- gdb/h8300-tdep.c 15 May 2002 11:13:30 -0000 *************** _initialize_h8300m (void) *** 828,841 **** void h8300_print_register_hook (int regno) { ! if (regno == 8) { /* CCR register */ int C, Z, N, V; ! unsigned char b[4]; unsigned char l; read_relative_register_raw_bytes (regno, b); ! l = b[REGISTER_VIRTUAL_SIZE (8) - 1]; printf_unfiltered ("\t"); printf_unfiltered ("I-%d - ", (l & 0x80) != 0); printf_unfiltered ("H-%d - ", (l & 0x20) != 0); --- 828,841 ---- void h8300_print_register_hook (int regno) { ! if (regno == CCR_REGNUM) { /* CCR register */ int C, Z, N, V; ! unsigned char b[REGISTER_SIZE]; unsigned char l; read_relative_register_raw_bytes (regno, b); ! l = b[REGISTER_VIRTUAL_SIZE (CCR_REGNUM) - 1]; printf_unfiltered ("\t"); printf_unfiltered ("I-%d - ", (l & 0x80) != 0); printf_unfiltered ("H-%d - ", (l & 0x20) != 0); Index: sim/h8300/compile.c =================================================================== RCS file: /cvs/src/src/sim/h8300/compile.c,v retrieving revision 1.8 diff -u -u -c -p -r1.8 compile.c *** sim/h8300/compile.c 20 Dec 2001 17:36:23 -0000 1.8 --- sim/h8300/compile.c 15 May 2002 11:13:31 -0000 *************** static int memory_size; *** 111,120 **** static int get_now () { ! #ifndef WIN32 ! return time (0); ! #endif ! return 0; } static int --- 111,117 ---- static int get_now () { ! return time (0); //WinXX HAS UNIX like 'time', so why not using it? } static int *************** lvalue (x, rn) *** 155,161 **** return X (OP_MEM, SP); default: ! abort (); } } --- 152,158 ---- return X (OP_MEM, SP); default: ! abort (); //?? May be something more usefull? } } *************** fetch (arg, n) *** 608,614 **** return t; default: ! abort (); } } --- 605,611 ---- return t; default: ! abort (); //?? May be something more usefull? } } *************** sim_resume (sd, step, siggnal) *** 997,1004 **** #endif ! cycles += code->cycles; ! insts++; switch (code->opcode) { case 0: --- 994,1005 ---- #endif ! if (code->opcode) ! { ! cycles += code->cycles; ! insts++; ! } ! switch (code->opcode) { case 0: *************** sim_fetch_register (sd, rn, buf, length) *** 1860,1869 **** { default: abort (); ! case 8: v = cpu.ccr; break; ! case 9: v = cpu.pc; break; case R0_REGNUM: --- 1861,1870 ---- { default: abort (); ! case CCR_REGNUM: v = cpu.ccr; break; ! case PC_REGNUM: v = cpu.pc; break; case R0_REGNUM: *************** sim_fetch_register (sd, rn, buf, length) *** 1876,1890 **** case R7_REGNUM: v = cpu.regs[rn]; break; ! case 10: v = cpu.cycles; longreg = 1; break; ! case 11: v = cpu.ticks; longreg = 1; break; ! case 12: v = cpu.insts; longreg = 1; break; --- 1877,1891 ---- case R7_REGNUM: v = cpu.regs[rn]; break; ! case CYCLE_REGNUM: v = cpu.cycles; longreg = 1; break; ! case TICK_REGNUM: v = cpu.ticks; longreg = 1; break; ! case INST_REGNUM: v = cpu.insts; longreg = 1; break;