From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 63857 invoked by alias); 7 Oct 2017 15:52:58 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 63116 invoked by uid 89); 7 Oct 2017 15:52:57 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD,SPF_HELO_PASS,SPF_PASS autolearn=ham version=3.3.2 spammy=Hx-spam-relays-external:sk:cable-1, H*r:sk:cable-1, H*RU:sk:cable-1, opening X-HELO: smtp.polymtl.ca Received: from smtp.polymtl.ca (HELO smtp.polymtl.ca) (132.207.4.11) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Sat, 07 Oct 2017 15:52:56 +0000 Received: from simark.ca (simark.ca [158.69.221.121]) (authenticated bits=0) by smtp.polymtl.ca (8.14.7/8.14.7) with ESMTP id v97FqZC1026929 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 7 Oct 2017 11:52:40 -0400 Received: from [10.0.0.11] (cable-192.222.251.162.electronicbox.net [192.222.251.162]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by simark.ca (Postfix) with ESMTPSA id 494C41E031; Sat, 7 Oct 2017 11:52:35 -0400 (EDT) Subject: Re: [PATCH v5 1/6] sim: cgen: add remainder functions (needed for OR1K lf.rem.[sd]) To: Stafford Horne , GDB patches Cc: Openrisc , Mike Frysinger , Peter Gavin References: <20171005134912.26799-1-shorne@gmail.com> <20171005134912.26799-2-shorne@gmail.com> From: Simon Marchi Message-ID: <22127605-6ea8-05c4-03a6-cc37478bd459@polymtl.ca> Date: Sat, 07 Oct 2017 15:52:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.3.0 MIME-Version: 1.0 In-Reply-To: <20171005134912.26799-2-shorne@gmail.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-Poly-FromMTA: (simark.ca [158.69.221.121]) at Sat, 7 Oct 2017 15:52:35 +0000 X-IsSubscribed: yes X-SW-Source: 2017-10/txt/msg00150.txt.bz2 As far as I can tell, this patch looks good, but I'm more or less clueless about floating point stuff... I just pointed out nits: On 2017-10-05 09:49 AM, Stafford Horne wrote: > From: Peter Gavin > > * sim/common/ChangeLog: > > 2016-05-21 Peter Gavin > Stafford Horne > > * cgen-accfp.c (remsf, remdf): New function. > (cgen_init_accurate_fpu): Add remsf and remdf. > * cgen-fpu.h (cgen_fp_ops): Add remsf, remdf, remxf and remtf. > * sim-fpu.c (sim_fpu_rem): New function. Mention the change to sim_fpu_print_status. sim-fpu.c contains other changes (comments added, lines removed). If you think the changes belong with this patch, mention them here, otherwise submit them as a separate patch. > @@ -1551,6 +1551,89 @@ sim_fpu_div (sim_fpu *f, > > > INLINE_SIM_FPU (int) > +sim_fpu_rem (sim_fpu *f, > + const sim_fpu *l, > + const sim_fpu *r) > +{ > + if (sim_fpu_is_snan (l)) > + { > + *f = *l; > + f->class = sim_fpu_class_qnan; > + return sim_fpu_status_invalid_snan; > + } > + if (sim_fpu_is_snan (r)) > + { > + *f = *r; > + f->class = sim_fpu_class_qnan; > + return sim_fpu_status_invalid_snan; > + } > + if (sim_fpu_is_qnan (l)) > + { > + *f = *l; > + f->class = sim_fpu_class_qnan; > + return 0; > + } > + if (sim_fpu_is_qnan (r)) > + { > + *f = *r; > + f->class = sim_fpu_class_qnan; > + return 0; > + } > + if (sim_fpu_is_infinity (l)) > + { > + *f = sim_fpu_qnan; > + return sim_fpu_status_invalid_irx; > + } > + if (sim_fpu_is_zero (r)) > + { > + *f = sim_fpu_qnan; > + return sim_fpu_status_invalid_div0; > + } > + if (sim_fpu_is_zero (l)) > + { > + *f = *l; > + return 0; > + } > + if (sim_fpu_is_infinity (r)) > + { > + *f = *l; > + return 0; > + } > + { > + sim_fpu n, tmp; > + > + /* Remainder is calculated as l-n*r, where n is l/r rounded to the > + nearest integer. The variable n is rounded half even. */ > + > + sim_fpu_div (&n, l, r); > + sim_fpu_round_64 (&n, 0, 0); > + > + if (n.normal_exp < -1) /* If n looks like zero just return l. */ > + { > + *f = *l; > + return 0; > + } > + else if (n.class == sim_fpu_class_number > + && n.normal_exp <= (NR_FRAC_GUARD)) /* If not too large round. */ This line should be aligned with the opening parenthesis (well, one char to the right). > + do_normal_round (&n, (NR_FRAC_GUARD) - n.normal_exp, sim_fpu_round_near); > + > + /* Mark 0's as zero so multiply can detect zero. */ > + if (n.fraction == 0) > + n.class = sim_fpu_class_zero; > + > + /* Calculate n*r. */ > + sim_fpu_mul (&tmp, &n, r); > + sim_fpu_round_64 (&tmp, 0, 0); > + > + /* Finally calculate l-n*r. */ > + sim_fpu_sub (f, l, &tmp); > + > + return 0; > + } > +} Thanks, Simon