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12 Aug 2026 06:30:21 -0700 From: Markus Metzger To: gdb-patches@sourceware.org Cc: Tankut Baris Aktemur Subject: [PATCH v4 43/44] testsuite, arch, intelgt: add intelgt-program-bp.exp Date: Wed, 12 Aug 2026 15:28:03 +0200 Message-ID: <20260812132805.380163-44-markus.t.metzger@intel.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260812132805.380163-1-markus.t.metzger@intel.com> References: <20260812132805.380163-1-markus.t.metzger@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces~public-inbox=simark.ca@sourceware.org From: Tankut Baris Aktemur Introduce a new test to check if GDB can resume from a manually-inserted program breakpoint on the Intel GT device without repeatedly hitting the breakpoint. --- gdb/testsuite/gdb.arch/intelgt-program-bp.exp | 83 +++++++++++++++++++ 1 file changed, 83 insertions(+) create mode 100644 gdb/testsuite/gdb.arch/intelgt-program-bp.exp diff --git a/gdb/testsuite/gdb.arch/intelgt-program-bp.exp b/gdb/testsuite/gdb.arch/intelgt-program-bp.exp new file mode 100644 index 00000000000..7e86592baa1 --- /dev/null +++ b/gdb/testsuite/gdb.arch/intelgt-program-bp.exp @@ -0,0 +1,83 @@ +# Copyright 2020-2026 Free Software Foundation, Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# +# Test that GDB steps over program breakpoints (i.e. breakpoints +# manually inserted by the user by modifying an instruction) on an +# Intel GT target. + +load_lib sycl.exp + +standard_testfile sycl-hello.cpp + +set sycl_device_list [init_sycl_devices_list] +if {[llength $sycl_device_list] == 0} { + unsupported "target does not support SYCL" + return +} + +if {[build_executable "failed to compile $srcfile" "$binfile" "$srcfile" \ + {sycl debug}]} { + return +} + +foreach device $sycl_device_list { + if {![require_sycl_device "$device" "gpu" "Intel*"]} { + unsupported "test is aimed at Intel GPUs only" + continue + } + + sycl_with_intelgt_lock $device { + clean_restart $testfile + + if {![sycl_start $device]} { + continue + } + + set kernel_line [gdb_get_line_number "inside-kernel"] + # Make the BP temporary, so that GDB will remove it. We will + # then set it manually. + gdb_breakpoint $kernel_line -temporary + gdb_continue_to_breakpoint "inside kernel" ".*$srcfile:$kernel_line.*" + + # Manually set the BP bit on the current PC and the next one. + with_test_prefix "current pc" { + set first_pc [get_hexadecimal_valueof "\$pc" 0 "first stop pc"] + set_breakpoint_bit $first_pc + } + + with_test_prefix "next pc" { + if {[is_compact_insn $first_pc]} { + # A compacted instruction is 8 bytes. + set next_pc [format 0x%x [expr $first_pc + 0x08]] + } else { + # A full instruction is 16 bytes. + set next_pc [format 0x%x [expr $first_pc + 0x10]] + } + set_breakpoint_bit $next_pc + } + + # We should now step-over the current PC and hit the manually-inserted + # BP on the next PC. + gdb_test "continue" \ + "Thread \[^\r\n\]+ received signal SIGTRAP.*" \ + "continue to the manual BP" + set second_pc [get_hexadecimal_valueof "\$pc" 0 "second stop pc"] + gdb_assert {$second_pc == $next_pc} + + # Resuming should not hit the manual BP again. Expect to terminate. + gdb_test "continue" "$inferior_exited_re normally].*" \ + "continue to end" + } +} -- 2.43.0 ________________________________________ Intel Deutschland GmbH Registered Address: Dornacher Strasse 1, 85622 Feldkirchen, Germany Tel: +49 (89) 99143-0 www.intel.de Managing Directors: Candice Moore, Jeffrey Schneiderman, Ramachandran Sitaraman Chairperson of the Supervisory Board: Sonja Pierer Registered Seat: Munich Commercial Register B: Amtsgericht Munich HRB 186928 This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies.