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12 Aug 2026 06:28:10 -0700 From: Markus Metzger To: gdb-patches@sourceware.org Cc: Natalia Saiapova Subject: [PATCH v4 01/44] bfd: add intelgt target to BFD Date: Wed, 12 Aug 2026 15:27:21 +0200 Message-ID: <20260812132805.380163-2-markus.t.metzger@intel.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260812132805.380163-1-markus.t.metzger@intel.com> References: <20260812132805.380163-1-markus.t.metzger@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces~public-inbox=simark.ca@sourceware.org From: Natalia Saiapova Add description of IntelGT target to BFD. Describe its relocation types. To: --- bfd/Makefile.am | 2 ++ bfd/Makefile.in | 4 ++++ bfd/archures.c | 4 ++++ bfd/bfd-in2.h | 2 ++ bfd/config.bfd | 5 +++++ bfd/configure | 1 + bfd/configure.ac | 1 + bfd/cpu-intelgt.c | 41 ++++++++++++++++++++++++++++++++++++ bfd/elf64-intelgt.c | 48 +++++++++++++++++++++++++++++++++++++++++++ bfd/targets.c | 2 ++ binutils/readelf.c | 5 +++++ include/elf/intelgt.h | 45 ++++++++++++++++++++++++++++++++++++++++ 12 files changed, 160 insertions(+) create mode 100644 bfd/cpu-intelgt.c create mode 100644 bfd/elf64-intelgt.c create mode 100644 include/elf/intelgt.h diff --git a/bfd/Makefile.am b/bfd/Makefile.am index e4df05441eb..1976b76ca50 100644 --- a/bfd/Makefile.am +++ b/bfd/Makefile.am @@ -119,6 +119,7 @@ ALL_MACHINES = \ cpu-i386.lo \ cpu-ia64.lo \ cpu-iamcu.lo \ + cpu-intelgt.lo \ cpu-ip2k.lo \ cpu-iq2000.lo \ cpu-kvx.lo \ @@ -202,6 +203,7 @@ ALL_MACHINES_CFILES = \ cpu-i386.c \ cpu-ia64.c \ cpu-iamcu.c \ + cpu-intelgt.c \ cpu-ip2k.c \ cpu-iq2000.c \ cpu-kvx.c \ diff --git a/bfd/Makefile.in b/bfd/Makefile.in index 14512cf61fb..5656faf4cc6 100644 --- a/bfd/Makefile.in +++ b/bfd/Makefile.in @@ -587,6 +587,7 @@ ALL_MACHINES = \ cpu-i386.lo \ cpu-ia64.lo \ cpu-iamcu.lo \ + cpu-intelgt.lo \ cpu-ip2k.lo \ cpu-iq2000.lo \ cpu-kvx.lo \ @@ -670,6 +671,7 @@ ALL_MACHINES_CFILES = \ cpu-i386.c \ cpu-ia64.c \ cpu-iamcu.c \ + cpu-intelgt.c \ cpu-ip2k.c \ cpu-iq2000.c \ cpu-kvx.c \ @@ -1028,6 +1030,7 @@ BFD64_BACKENDS = \ elf64-hppa.lo \ elf64-ia64-vms.lo \ elf64-ia64.lo \ + elf64-intelgt.lo \ elf64-kvx.lo \ elf64-loongarch.lo \ elf64-mips.lo \ @@ -1499,6 +1502,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-i386.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-ia64.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-iamcu.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-intelgt.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-ip2k.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-iq2000.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-kvx.Plo@am__quote@ diff --git a/bfd/archures.c b/bfd/archures.c index 18472b820bc..3bf2a93ab35 100644 --- a/bfd/archures.c +++ b/bfd/archures.c @@ -399,6 +399,8 @@ DESCRIPTION . bfd_arch_ia64, {* HP/Intel ia64. *} .#define bfd_mach_ia64_elf64 64 .#define bfd_mach_ia64_elf32 32 +. bfd_arch_intelgt, {* Intel(R) Graphics Technology. *} +.#define bfd_mach_intelgt 9 . bfd_arch_ip2k, {* Ubicom IP2K microcontrollers. *} .#define bfd_mach_ip2022 1 .#define bfd_mach_ip2022ext 2 @@ -667,6 +669,7 @@ extern const bfd_arch_info_type bfd_hppa_arch; extern const bfd_arch_info_type bfd_i386_arch; extern const bfd_arch_info_type bfd_iamcu_arch; extern const bfd_arch_info_type bfd_ia64_arch; +extern const bfd_arch_info_type bfd_intelgt_arch; extern const bfd_arch_info_type bfd_ip2k_arch; extern const bfd_arch_info_type bfd_iq2000_arch; extern const bfd_arch_info_type bfd_kvx_arch; @@ -755,6 +758,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] = &bfd_i386_arch, &bfd_iamcu_arch, &bfd_ia64_arch, + &bfd_intelgt_arch, &bfd_ip2k_arch, &bfd_iq2000_arch, &bfd_kvx_arch, diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 8d12ddf6723..611403f6925 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -1656,6 +1656,8 @@ enum bfd_architecture bfd_arch_ia64, /* HP/Intel ia64. */ #define bfd_mach_ia64_elf64 64 #define bfd_mach_ia64_elf32 32 + bfd_arch_intelgt, /* Intel(R) Graphics Technology. */ +#define bfd_mach_intelgt 9 bfd_arch_ip2k, /* Ubicom IP2K microcontrollers. */ #define bfd_mach_ip2022 1 #define bfd_mach_ip2022ext 2 diff --git a/bfd/config.bfd b/bfd/config.bfd index 8eb2131128d..82c2dfef0e8 100644 --- a/bfd/config.bfd +++ b/bfd/config.bfd @@ -204,6 +204,7 @@ fido*) targ_archs=bfd_m68k_arch ;; hppa*) targ_archs=bfd_hppa_arch ;; i[3-7]86) targ_archs=bfd_i386_arch ;; ia16) targ_archs=bfd_i386_arch ;; +intelgt) targ_archs=bfd_intelgt_arch ;; loongarch*) targ_archs=bfd_loongarch_arch ;; m6811*|m68hc11*) targ_archs="bfd_m68hc11_arch bfd_m68hc12_arch bfd_m9s12x_arch bfd_m9s12xg_arch" ;; m6812*|m68hc12*) targ_archs="bfd_m68hc12_arch bfd_m68hc11_arch bfd_m9s12x_arch bfd_m9s12xg_arch" ;; @@ -657,6 +658,10 @@ case "${targ}" in targ_selvecs=alpha_vms_lib_txt_vec want64=true ;; + intelgt-*-elf) + targ_defvec=intelgt_elf64_vec + want64=true + ;; #endif /* BFD64 */ ip2k-*-elf) diff --git a/bfd/configure b/bfd/configure index 12d43a5aeae..71192288275 100755 --- a/bfd/configure +++ b/bfd/configure @@ -15947,6 +15947,7 @@ do ia64_elf64_hpux_be_vec) tb="$tb elf64-ia64.lo elfxx-ia64.lo elf64.lo $elf"; target_size=64 ;; ia64_elf64_vms_vec) tb="$tb elf64-ia64-vms.lo elf64-ia64.lo elfxx-ia64.lo elf64.lo vms-lib.lo vms-misc.lo $elf"; target_size=64 ;; ia64_pei_vec) tb="$tb pei-ia64.lo pepigen.lo $coff"; target_size=64 ;; + intelgt_elf64_vec) tb="$tb elf64-intelgt.lo elf64.lo $elf"; target_size=64 ;; ip2k_elf32_vec) tb="$tb elf32-ip2k.lo elf32.lo $elf" ;; iq2000_elf32_vec) tb="$tb elf32-iq2000.lo elf32.lo $elf" ;; kvx_elf32_vec) tb="$tb elf32-kvx.lo elfxx-kvx.lo elf32.lo $elf $ipa" ;; diff --git a/bfd/configure.ac b/bfd/configure.ac index ee335f75dd9..dd8c9d87776 100644 --- a/bfd/configure.ac +++ b/bfd/configure.ac @@ -488,6 +488,7 @@ do ia64_elf64_hpux_be_vec) tb="$tb elf64-ia64.lo elfxx-ia64.lo elf64.lo $elf"; target_size=64 ;; ia64_elf64_vms_vec) tb="$tb elf64-ia64-vms.lo elf64-ia64.lo elfxx-ia64.lo elf64.lo vms-lib.lo vms-misc.lo $elf"; target_size=64 ;; ia64_pei_vec) tb="$tb pei-ia64.lo pepigen.lo $coff"; target_size=64 ;; + intelgt_elf64_vec) tb="$tb elf64-intelgt.lo elf64.lo $elf"; target_size=64 ;; ip2k_elf32_vec) tb="$tb elf32-ip2k.lo elf32.lo $elf" ;; iq2000_elf32_vec) tb="$tb elf32-iq2000.lo elf32.lo $elf" ;; kvx_elf32_vec) tb="$tb elf32-kvx.lo elfxx-kvx.lo elf32.lo $elf $ipa" ;; diff --git a/bfd/cpu-intelgt.c b/bfd/cpu-intelgt.c new file mode 100644 index 00000000000..87341eda015 --- /dev/null +++ b/bfd/cpu-intelgt.c @@ -0,0 +1,41 @@ +/* BFD support for the Intel(R) Graphics Technology architecture. + Copyright (C) 2019-2026 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "sysdep.h" +#include "bfd.h" +#include "libbfd.h" + +const bfd_arch_info_type bfd_intelgt_arch = + { + 32, /* 32 bits in a word. */ + 64, /* 64 bits in an address. */ + 8, /* 8 bits in a byte. */ + bfd_arch_intelgt, /* Architecture. */ + bfd_mach_intelgt, /* Machine number. */ + "intelgt", /* Architecture name. */ + "intelgt", /* Printable name. */ + 3, /* Section alignment power. */ + true, /* Default machine for this architecture. */ + bfd_default_compatible, /* Check for compatibility. */ + bfd_default_scan, /* Check for an arch and mach hit. */ + bfd_arch_default_fill, /* Allocate and fill bfd. */ + NULL, /* Pointer to next. */ + 0 /* Maximum offset of a reloc from the start of an insn. */ + }; diff --git a/bfd/elf64-intelgt.c b/bfd/elf64-intelgt.c new file mode 100644 index 00000000000..11369242f15 --- /dev/null +++ b/bfd/elf64-intelgt.c @@ -0,0 +1,48 @@ +/* Intel(R) Graphics Technology-specific support for ELF + Copyright (C) 2022-2026 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "sysdep.h" +#include "bfd.h" +#include "libbfd.h" +#include "elf-bfd.h" + +#include "elf/common.h" +#include "elf/intelgt.h" + + +static bool +elf64_intelgt_elf_object_p (bfd *abfd) +{ + return bfd_default_set_arch_mach (abfd, bfd_arch_intelgt, bfd_mach_intelgt); +} + +#define TARGET_LITTLE_SYM intelgt_elf64_vec +#define TARGET_LITTLE_NAME "elf64-intelgt" +#define ELF_ARCH bfd_arch_intelgt +#define ELF_MACHINE_CODE EM_INTELGT +#define ELF_OSABI 0 +#define ELF_MAXPAGESIZE 0x40000000 + +#define elf_backend_object_p elf64_intelgt_elf_object_p + +#define bfd_elf64_bfd_reloc_type_lookup bfd_default_reloc_type_lookup +#define bfd_elf64_bfd_reloc_name_lookup _bfd_norelocs_bfd_reloc_name_lookup + +#include "elf64-target.h" diff --git a/bfd/targets.c b/bfd/targets.c index fcf650410dc..5a665acd3fe 100644 --- a/bfd/targets.c +++ b/bfd/targets.c @@ -766,6 +766,7 @@ extern const bfd_target ia64_elf64_le_vec; extern const bfd_target ia64_elf64_hpux_be_vec; extern const bfd_target ia64_elf64_vms_vec; extern const bfd_target ia64_pei_vec; +extern const bfd_target intelgt_elf64_vec; extern const bfd_target ip2k_elf32_vec; extern const bfd_target iq2000_elf32_vec; extern const bfd_target kvx_elf32_vec; @@ -1121,6 +1122,7 @@ static const bfd_target * const _bfd_target_vector[] = &ia64_elf64_hpux_be_vec, &ia64_elf64_vms_vec, &ia64_pei_vec, + &intelgt_elf64_vec, #endif &ip2k_elf32_vec, diff --git a/binutils/readelf.c b/binutils/readelf.c index b5865d9717e..a6a6f390995 100644 --- a/binutils/readelf.c +++ b/binutils/readelf.c @@ -125,6 +125,7 @@ #include "elf/kvx.h" #include "elf/lm32.h" #include "elf/iq2000.h" +#include "elf/intelgt.h" #include "elf/m32c.h" #include "elf/m32r.h" #include "elf/m68k.h" @@ -2687,6 +2688,10 @@ dump_relocations (Filedata * filedata, case EM_AMDGPU: rtype = elf_amdgpu_reloc_type (type); break; + + case EM_INTELGT: + rtype = elf_intelgt_reloc_type (type); + break; } char *symbol_name = NULL; diff --git a/include/elf/intelgt.h b/include/elf/intelgt.h new file mode 100644 index 00000000000..bcc62ee8f35 --- /dev/null +++ b/include/elf/intelgt.h @@ -0,0 +1,45 @@ +/* Copyright (C) 2022-2026 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +/* This file holds definitions specific to the IntelGT ABI. */ + +#ifndef _ELF_INTELGT_H_ +#define _ELF_INTELGT_H_ + +#include "elf/reloc-macros.h" + +START_RELOC_NUMBERS (elf_intelgt_reloc_type) + RELOC_NUMBER (R_ZE_NONE, 0) + /* 64-bit address. */ + RELOC_NUMBER (R_ZE_SYM_ADDR, 1) + /* 32-bit address or lower 32-bit of a 64-bit address. */ + RELOC_NUMBER (R_ZE_SYM_ADDR_32, 2) + /* Higher 32bits of a 64-bit address. */ + RELOC_NUMBER (R_ZE_SYM_ADDR32_HI, 3) + /* 32-bit field of payload offset of per-thread data. */ + RELOC_NUMBER (R_ZE_PER_THREAD_PAYLOAD_OFFSET_32, 4) + /* 32-bit global immediate. */ + RELOC_NUMBER (R_ZE_GLOBAL_IMM_32, 5) + /* SEND instruction offset, used for BTI patching. */ + RELOC_NUMBER (R_ZE_SEND, 6) + /* 16-bit address or immediate. */ + RELOC_NUMBER (R_ZE_SYM_ADDR_16, 7) +END_RELOC_NUMBERS (R_ZE_max) + +#endif /* _ELF_INTELGT_H_ */ -- 2.43.0 ________________________________________ Intel Deutschland GmbH Registered Address: Dornacher Strasse 1, 85622 Feldkirchen, Germany Tel: +49 (89) 99143-0 www.intel.de Managing Directors: Candice Moore, Jeffrey Schneiderman, Ramachandran Sitaraman Chairperson of the Supervisory Board: Sonja Pierer Registered Seat: Munich Commercial Register B: Amtsgericht Munich HRB 186928 This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). 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