From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id EXy4GuSoMmoS9wsAWB0awg (envelope-from ) for ; Wed, 17 Jun 2026 10:02:12 -0400 Authentication-Results: simark.ca; dkim=pass (1024-bit key; unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256 header.s=mimecast20190719 header.b=XJQrm16G; dkim-atps=neutral Received: by simark.ca (Postfix, from userid 112) id 68C781E098; Wed, 17 Jun 2026 10:02:12 -0400 (EDT) X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-25) on simark.ca X-Spam-Level: X-Spam-Status: No, score=-3.1 required=5.0 tests=ARC_SIGNED,ARC_VALID,BAYES_00, DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED,RCVD_IN_SBL_CSS autolearn=ham autolearn_force=no version=4.0.1 Received: from vm01.sourceware.org (vm01.sourceware.org [IPv6:2620:52:6:3111::32]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id D24C01E024 for ; Wed, 17 Jun 2026 10:02:11 -0400 (EDT) Received: from vm01.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 8B01C4BA2E18 for ; Wed, 17 Jun 2026 14:02:09 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 8B01C4BA2E18 Authentication-Results: sourceware.org; dkim=pass (1024-bit key, unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256 header.s=mimecast20190719 header.b=XJQrm16G Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by sourceware.org (Postfix) with ESMTP id 20C5F4BA2E05 for ; Wed, 17 Jun 2026 14:01:12 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 20C5F4BA2E05 Authentication-Results: sourceware.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=redhat.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 20C5F4BA2E05 Authentication-Results: sourceware.org; arc=none smtp.remote-ip=170.10.129.124 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1781704872; cv=none; b=nUj+9uZg6/xYnkg/Bbqzdb/B3CmYPgjmOysV/BFKU4nvGmEW0nMaMKLE2b+ZgIGGv4388ThvqLpxShS8FAARX3D8gWgdZ3Av7BFw2kEUQi2ESzQT2JYMILl09UQWp1LfnaMv7sVqLYX/jMx066bQoGbvcabheJv+9Qmly+djAI8= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1781704872; c=relaxed/simple; bh=knk/x4BVOBUYkZ2iKnvivb7zJ7u/RDoZmSM3w6j1z/I=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=o+ra++AuAY9gVLumdUlB2UGJiURdL9gF2kmrvlKcZCx/dE+N9VcfyGTdYMgAjbdrCN5DeOsLz6/IatYXRAauIv6HIiT4RZ/k3n1dcqpnwuYU8Ieu6meJjl7GstE/Xt7Ipz2U9d4ujbYGll11Wcvei1DeubEG1sZKrhJTvfUUrSY= ARC-Authentication-Results: i=1; sourceware.org; dkim=pass (1024-bit key, unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256 header.s=mimecast20190719 header.b=XJQrm16G DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 20C5F4BA2E05 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1781704871; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=OscS9u6X2E58wEVTNaTNgpgOc1mO0OMTEz8PmMOw/Sk=; b=XJQrm16Gb8OsbfJrhSSwaoJLLUr3utLYegLBpYrPPoM3pOnbFlChsn6x4XMr/K2I212t55 cYYj0NndTqxoSWc0f5V3ZdagJylhX7vU8+oUdFljH+qctilhplrlU7HWZoI29ByIsRqmlb vo08O6gdkXRK5RtNoQapVHaZuCOtZPo= Received: from mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-245-64T9kZgFPjur5KuGrqRA0g-1; Wed, 17 Jun 2026 10:01:09 -0400 X-MC-Unique: 64T9kZgFPjur5KuGrqRA0g-1 X-Mimecast-MFC-AGG-ID: 64T9kZgFPjur5KuGrqRA0g_1781704869 Received: from mx-prod-int-10.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-10.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.95]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 09895195411D for ; Wed, 17 Jun 2026 14:01:09 +0000 (UTC) Received: from fedora.redhat.com (unknown [10.96.134.85]) by mx-prod-int-10.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 1400B36918; Wed, 17 Jun 2026 14:01:07 +0000 (UTC) From: Guinevere Larsen To: gdb-patches@sourceware.org Cc: Guinevere Larsen Subject: [PATCH 2/2] gdb/record: add support for BMI2 instructions Date: Wed, 17 Jun 2026 11:00:58 -0300 Message-ID: <20260617140058.20727-3-guinevere@redhat.com> In-Reply-To: <20260617140058.20727-2-guinevere@redhat.com> References: <20260617124201.15794-1-guinevere@redhat.com> <20260617140058.20727-2-guinevere@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.6 on 10.30.177.95 X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: ElXUOxy6Ckc6R3roBzbuMPkOCO7oNDhXlInnbZojgOs_1781704869 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: 8bit content-type: text/plain; charset="US-ASCII"; x-default=true X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces~public-inbox=simark.ca@sourceware.org This commit adds support for recording all instructions in the Bit Manipulation Instruction set 2, for x86 cpus. The specific instructions are: * mulx * pdep * pext * rorx * sarx * sh[r|l]x * bzhi And adds them to the AVX test, for the same reason as the previous commit. --- gdb/i386-tdep.c | 18 ++++++++++++++++-- gdb/testsuite/gdb.reverse/i386-avx-reverse.c | 13 +++++++++++++ gdb/testsuite/gdb.reverse/i386-avx-reverse.exp | 14 ++++++++++++++ 3 files changed, 43 insertions(+), 2 deletions(-) diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c index 8b4dfb43f61..189a711fd81 100644 --- a/gdb/i386-tdep.c +++ b/gdb/i386-tdep.c @@ -5128,7 +5128,7 @@ i386_record_vex (struct i386_record_s *ir, uint8_t vex_w, uint8_t vex_r, case 0xf2: /* VPSLLD, dynamic shift and ANDN. */ case 0xf3: /* VPSLLQ, dynamic shift and BLSI, BLSR and BLSMSK. */ case 0xf4: /* VPMULUDQ */ - case 0xf6: /* VPSADBW. */ + case 0xf6: /* VPSADBW or MULX. */ case 0xfc: /* VPADDB */ case 0xfd: /* VPADDW */ case 0xfe: /* VPADDD */ @@ -5152,6 +5152,15 @@ i386_record_vex (struct i386_record_s *ir, uint8_t vex_w, uint8_t vex_r, record_full_arch_list_add_reg (ir->regcache, ir->regmap[X86_RECORD_EFLAGS_REGNUM]); } + else if (opcode == 0xf6 && ir->map_select == 2) + { + record_full_arch_list_add_reg (ir->regcache, + ir->regmap[X86_RECORD_REAX_REGNUM + + ir->vvvv]); + record_full_arch_list_add_reg (ir->regcache, + ir->regmap[X86_RECORD_REAX_REGNUM + + reg_offset]); + } else { /* This set of instructions all share the same exact way to @@ -5164,11 +5173,16 @@ i386_record_vex (struct i386_record_s *ir, uint8_t vex_w, uint8_t vex_r, } break; - case 0xf7: /* BEXTR. */ + case 0xf0: /* RORX. */ + case 0xf5: /* PDEP or PEXT or BZHI. */ + case 0xf7: /* BEXTR or SARX or SHLX or SHRX. */ i386_record_modrm (ir); record_full_arch_list_add_reg (ir->regcache, ir->regmap[X86_RECORD_REAX_REGNUM + ir->reg + vex_r * 8]); + if (opcode == 0xf5 && ir->pp == 0) + record_full_arch_list_add_reg (ir->regcache, + ir->regmap[X86_RECORD_EFLAGS_REGNUM]); break; case 0x2e: /* VUCOMIS[S|D]. */ diff --git a/gdb/testsuite/gdb.reverse/i386-avx-reverse.c b/gdb/testsuite/gdb.reverse/i386-avx-reverse.c index 190bc6f4a7a..4e4428f695a 100644 --- a/gdb/testsuite/gdb.reverse/i386-avx-reverse.c +++ b/gdb/testsuite/gdb.reverse/i386-avx-reverse.c @@ -799,6 +799,19 @@ bmi_test () asm volatile ("tzcnt %eax, %ebx"); asm volatile ("tzcnt %ax, %r8w"); + asm volatile ("mulx %eax, %ebx, %ecx"); + asm volatile ("mulx %ebx, %ecx, %ebx"); + + asm volatile ("pdep %r8, %rcx, %rbx"); + asm volatile ("pext %edx, %ecx, %ebx"); + asm volatile ("rorx $10, %r8, %rbx"); + asm volatile ("sarx %edx, %ebx, %eax"); + asm volatile ("shlx %eax, %ecx, %ebx"); + asm volatile ("shrx %r8d, %eax, %ecx"); + + asm volatile ("bzhi %edx, %ebx, %r8d"); + asm volatile ("bzhi %rax, %rcx, %r8"); + return 0; /* end bmi_test */ } diff --git a/gdb/testsuite/gdb.reverse/i386-avx-reverse.exp b/gdb/testsuite/gdb.reverse/i386-avx-reverse.exp index e1780267ad0..a482142edde 100644 --- a/gdb/testsuite/gdb.reverse/i386-avx-reverse.exp +++ b/gdb/testsuite/gdb.reverse/i386-avx-reverse.exp @@ -1206,9 +1206,23 @@ gdb_test_no_output \ "set \$eax = 0x1312" "set eax for bmi test" gdb_test_no_output "set \$ebx = 0xdeadbeef" "set ebx for bmi test" gdb_test_no_output "set \$ecx = 0xcafeface" "set ecx for bmi test" +gdb_test_no_output "set \$edx = 0x2337" "set edx for bmi test" if {[record_full_function "bmi"] == true} { + test_one_general_register "bzhi" "r8" "0xe884173" + test_one_general_register "bzhi" "r8" "0x0" + + test_one_general_register "shrx" "ecx" "0x0" + test_one_general_register "shlx" "ebx" "0x0" + test_one_general_register "sarx" "eax" "0x3" + test_one_general_register "rorx" "ebx" "0x3b" + test_one_general_register "pext" "ebx" "0x0" + test_one_general_register "pdep" "ebx" "0x0" + + test_one_general_register "mulx" "ecx" "0x0" + test_one_general_register "mulx" "ebx" "0x0" + test_one_general_register "tzcnt" "r8" "0x3e" test_one_general_register "tzcnt" "ebx" "0xe" test_one_general_register "tzcnt" "ecx" "0x1e" -- 2.54.0