[PATCH v2 2/2] gdbserver: riscv: Add support for hardware breakpoints/watchpoints

[Zane Leung <liangzhen@linux.spacemit.com>]

From: liangzhen <zhen.liang@spacemit.com>

Add support for hardware breakpoints and watchpoints on RISC-V Linux
gdbserver.

Signed-off-by: liangzhen <zhen.liang@spacemit.com>
---
 gdbserver/configure.srv      |   3 +
 gdbserver/linux-riscv-low.cc | 239 +++++++++++++++++++++++++++++++++++
 2 files changed, 242 insertions(+)

diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv
index 7bdd92e3f82..a2a01777cc8 100644
--- a/gdbserver/configure.srv
+++ b/gdbserver/configure.srv
@@ -284,6 +284,9 @@ case "${gdbserver_host}" in
   riscv*-*-linux*)	srv_tgtobj="arch/riscv.o nat/riscv-linux-tdesc.o"
 			srv_tgtobj="${srv_tgtobj} linux-riscv-low.o"
 			srv_tgtobj="${srv_tgtobj} ${srv_linux_obj}"
+			srv_tgtobj="${srv_tgtobj} nat/riscv-hw-point.o"
+			srv_tgtobj="${srv_tgtobj} nat/riscv-linux.o"
+			srv_tgtobj="${srv_tgtobj} nat/riscv-linux-hw-point.o"
 			srv_linux_regsets=yes
 			srv_linux_usrregs=yes
 			srv_linux_thread_db=yes
diff --git a/gdbserver/linux-riscv-low.cc b/gdbserver/linux-riscv-low.cc
index 8cc0a980fc1..d295619661e 100644
--- a/gdbserver/linux-riscv-low.cc
+++ b/gdbserver/linux-riscv-low.cc
@@ -21,6 +21,9 @@
 #include "linux-low.h"
 #include "tdesc.h"
 #include "elf/common.h"
+#include "nat/riscv-hw-point.h"
+#include "nat/riscv-linux.h"
+#include "nat/riscv-linux-hw-point.h"
 #include "nat/riscv-linux-tdesc.h"
 #include "opcode/riscv.h"
 
@@ -41,6 +44,8 @@ public:
 
   const gdb_byte *sw_breakpoint_from_kind (int kind, int *size) override;
 
+  bool supports_z_point_type (char z_type) override;
+
 protected:
 
   void low_arch_setup () override;
@@ -59,6 +64,28 @@ protected:
 
   bool low_breakpoint_at (CORE_ADDR pc) override;
 
+  int low_insert_point (raw_bkpt_type type, CORE_ADDR addr,
+			int size, raw_breakpoint *bp) override;
+
+  int low_remove_point (raw_bkpt_type type, CORE_ADDR addr,
+			int size, raw_breakpoint *bp) override;
+
+  bool low_stopped_by_watchpoint () override;
+
+  std::vector<CORE_ADDR> low_stopped_data_addresses () override;
+
+  arch_process_info *low_new_process () override;
+
+  void low_delete_process (arch_process_info *info) override;
+
+  void low_new_thread (lwp_info *) override;
+
+  void low_delete_thread (arch_lwp_info *) override;
+
+  void low_new_fork (process_info *parent, process_info *child) override;
+
+  void low_prepare_to_resume (lwp_info *lwp) override;
+
   bool low_supports_catch_syscall () override;
 
   void low_get_syscall_trapinfo (regcache *regcache, int *sysno) override;
@@ -82,6 +109,19 @@ riscv_target::low_cannot_store_register (int regno)
 			  "is not implemented by the target");
 }
 
+void
+riscv_target::low_prepare_to_resume (lwp_info *lwp)
+{
+  riscv_linux_prepare_to_resume (lwp);
+}
+
+/* Per-process arch-specific data we want to keep.  */
+
+struct arch_process_info
+{
+  struct riscv_debug_reg_state debug_reg_state;
+};
+
 /* Implementation of linux target ops method "low_supports_catch_syscall".  */
 
 bool
@@ -120,6 +160,7 @@ riscv_target::low_arch_setup ()
     }
 
   current_process ()->tdesc = tdesc.release ();
+  riscv_linux_get_debug_reg_capacity (current_thread->id.lwp ());
 }
 
 /* Collect GPRs from REGCACHE into BUF.  */
@@ -335,6 +376,204 @@ riscv_target::low_breakpoint_at (CORE_ADDR pc)
     return false;
 }
 
+/* Initialize the per-process RISC-V hardware debug register state.
+   Clear all breakpoint/watchpoint entries and reset their reference
+   counters in *STATE.  */
+
+static void
+riscv_init_debug_reg_state (struct riscv_debug_reg_state *state)
+{
+  for (int i = 0; i < RISCV_HWBP_MAX_NUM; ++i)
+    {
+      state->dr_addr_hwbp[i] = 0;
+      state->dr_type_hwbp[i] = 0;
+      state->dr_len_hwbp[i] = 0;
+      state->dr_ref_count_hwbp[i] = 0;
+    }
+}
+
+/* See nat/riscv-linux-hw-point.h.  */
+
+struct riscv_debug_reg_state *
+riscv_get_debug_reg_state (pid_t pid)
+{
+  struct process_info *proc = find_process_pid (pid);
+
+  return &proc->priv->arch_private->debug_reg_state;
+}
+
+/* Implementation of target ops method "supports_z_point_type".  */
+
+bool
+riscv_target::supports_z_point_type (char z_type)
+{
+  switch (z_type)
+    {
+    case Z_PACKET_SW_BP:
+    case Z_PACKET_HW_BP:
+    case Z_PACKET_WRITE_WP:
+    case Z_PACKET_READ_WP:
+    case Z_PACKET_ACCESS_WP:
+      return true;
+    default:
+      return false;
+    }
+}
+
+/* Implementation of linux target ops method "low_insert_point".
+
+   It actually only records the info of the to-be-inserted bp/wp;
+   the actual insertion will happen when threads are resumed.  */
+
+int
+riscv_target::low_insert_point (raw_bkpt_type type, CORE_ADDR addr,
+				int len, raw_breakpoint *bp)
+{
+  int ret;
+  enum target_hw_bp_type targ_type;
+  struct riscv_debug_reg_state *state
+    = riscv_get_debug_reg_state (current_thread->id.pid ());
+
+  if (show_debug_regs)
+    fprintf (stderr, "insert_point on entry (addr=0x%08lx, len=%d)\n",
+	     (unsigned long) addr, len);
+
+  /* Determine the type from the raw breakpoint type.  */
+  targ_type = raw_bkpt_type_to_target_hw_bp_type (type);
+
+  ret = riscv_handle_point (targ_type, addr, len,
+			    1 /* is_insert */,
+			    current_lwp_ptid (), state);
+
+  if (show_debug_regs)
+    riscv_show_debug_reg_state (state, "insert_point", addr, len,
+				targ_type);
+
+  return ret;
+}
+
+/* Implementation of linux target ops method "low_remove_point".
+
+   It actually only records the info of the to-be-removed bp/wp,
+   the actual removal will be done when threads are resumed.  */
+
+int
+riscv_target::low_remove_point (raw_bkpt_type type, CORE_ADDR addr,
+				int len, raw_breakpoint *bp)
+{
+  int ret;
+  enum target_hw_bp_type targ_type;
+  struct riscv_debug_reg_state *state
+    = riscv_get_debug_reg_state (current_thread->id.pid ());
+
+  if (show_debug_regs)
+    fprintf (stderr, "remove_point on entry (addr=0x%08lx, len=%d)\n",
+	     (unsigned long) addr, len);
+
+  /* Determine the type from the raw breakpoint type.  */
+  targ_type = raw_bkpt_type_to_target_hw_bp_type (type);
+
+  ret = riscv_handle_point (targ_type, addr, len,
+			    0 /* is_insert */,
+			    current_lwp_ptid (), state);
+
+  if (show_debug_regs)
+    riscv_show_debug_reg_state (state, "remove_point", addr, len,
+				targ_type);
+
+  return ret;
+}
+
+/* Implementation of linux target ops method "low_stopped_data_addresses".  */
+
+std::vector<CORE_ADDR>
+riscv_target::low_stopped_data_addresses ()
+{
+  siginfo_t siginfo;
+  struct riscv_debug_reg_state *state;
+  int pid = current_thread->id.lwp ();
+
+  /* Get the siginfo.  */
+  if (ptrace (PTRACE_GETSIGINFO, pid, NULL, &siginfo) != 0)
+    return {};
+
+  /* Need to be a hardware breakpoint/watchpoint trap.  */
+  if (siginfo.si_signo != SIGTRAP
+      || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
+    return {};
+
+  /* Check if the address matches any watched address.  */
+  state = riscv_get_debug_reg_state (current_thread->id.pid ());
+  CORE_ADDR result;
+  if (riscv_stopped_data_address (state, (CORE_ADDR) siginfo.si_addr, &result))
+    return { result };
+
+  return {};
+}
+
+/* Implementation of linux target ops method "low_stopped_by_watchpoint".  */
+
+bool
+riscv_target::low_stopped_by_watchpoint ()
+{
+  return !low_stopped_data_addresses ().empty ();
+}
+
+/* Implementation of linux target ops method "low_new_process".  */
+
+arch_process_info *
+riscv_target::low_new_process ()
+{
+  struct arch_process_info *info = XCNEW (struct arch_process_info);
+
+  riscv_init_debug_reg_state (&info->debug_reg_state);
+
+  return info;
+}
+
+/* Implementation of linux target ops method "low_delete_process".  */
+
+void
+riscv_target::low_delete_process (arch_process_info *info)
+{
+  xfree (info);
+}
+
+void
+riscv_target::low_new_thread (lwp_info *lwp)
+{
+  riscv_linux_new_thread (lwp);
+}
+
+void
+riscv_target::low_delete_thread (arch_lwp_info *arch_lwp)
+{
+  riscv_linux_delete_thread (arch_lwp);
+}
+
+/* Implementation of linux target ops method "low_new_fork".  */
+
+void
+riscv_target::low_new_fork (process_info *parent,
+			      process_info *child)
+{
+  /* These are allocated by linux_add_process.  */
+  gdb_assert (parent->priv != NULL
+	      && parent->priv->arch_private != NULL);
+  gdb_assert (child->priv != NULL
+	      && child->priv->arch_private != NULL);
+
+  /* GDB core assumes the child inherits the watchpoints/hw
+     breakpoints of the parent, and will remove them all from the
+     forked off process. Copy the debug registers mirrors into the
+     new process so that all breakpoints and watchpoints can be
+     removed together.  The debug registers mirror will become zeroed
+     in the end before detaching the forked off process, thus making
+     this compatible with older Linux kernels too.  */
+
+  *child->priv->arch_private = *parent->priv->arch_private;
+}
+
 /* The linux target ops object.  */
 
 linux_process_target *the_linux_target = &the_riscv_target;
-- 
2.34.1