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This is necessary because the system call ID is passed in different registers. Add a simple pass-rv32e.s test mimicking the pass.s for the I ISA variant. Signed-off-by: Dimitar Dimitrov --- sim/testsuite/riscv/c-ext.s | 2 +- sim/testsuite/riscv/jalr.s | 8 ++- sim/testsuite/riscv/m-ext.s | 8 ++- sim/testsuite/riscv/pass-rv32e.s | 10 ++++ sim/testsuite/riscv/pass.s | 8 ++- sim/testsuite/riscv/testutils-e.inc | 58 +++++++++++++++++++ .../riscv/{testutils.inc => testutils-i.inc} | 0 7 files changed, 90 insertions(+), 4 deletions(-) create mode 100644 sim/testsuite/riscv/pass-rv32e.s create mode 100644 sim/testsuite/riscv/testutils-e.inc rename sim/testsuite/riscv/{testutils.inc => testutils-i.inc} (100%) diff --git a/sim/testsuite/riscv/c-ext.s b/sim/testsuite/riscv/c-ext.s index ad6e7b239f2..3836621fb5c 100644 --- a/sim/testsuite/riscv/c-ext.s +++ b/sim/testsuite/riscv/c-ext.s @@ -7,7 +7,7 @@ # as(riscv32): -march=rv32ic # as(riscv64): -march=rv64ic -.include "testutils.inc" +.include "testutils-i.inc" .data .align 4 diff --git a/sim/testsuite/riscv/jalr.s b/sim/testsuite/riscv/jalr.s index 294f48564d8..211cfb32300 100644 --- a/sim/testsuite/riscv/jalr.s +++ b/sim/testsuite/riscv/jalr.s @@ -1,7 +1,13 @@ # Basic jalr tests. # mach: riscv32 riscv64 +# sim(riscv32): --model RV32IC +# sim(riscv64): --model RV64IC +# ld(riscv32): -m elf32lriscv +# ld(riscv64): -m elf64lriscv +# as(riscv32): -march=rv32ic +# as(riscv64): -march=rv64ic -.include "testutils.inc" +.include "testutils-i.inc" start diff --git a/sim/testsuite/riscv/m-ext.s b/sim/testsuite/riscv/m-ext.s index 4247156bea4..cdefcc7b63a 100644 --- a/sim/testsuite/riscv/m-ext.s +++ b/sim/testsuite/riscv/m-ext.s @@ -1,7 +1,13 @@ # Check that the RV32M instructions run without any faults. # mach: riscv32 riscv64 +# sim(riscv32): --model RV32IC +# sim(riscv64): --model RV64IC +# ld(riscv32): -m elf32lriscv +# ld(riscv64): -m elf64lriscv +# as(riscv32): -march=rv32ic +# as(riscv64): -march=rv64ic -.include "testutils.inc" +.include "testutils-i.inc" start diff --git a/sim/testsuite/riscv/pass-rv32e.s b/sim/testsuite/riscv/pass-rv32e.s new file mode 100644 index 00000000000..18ef08ae2b3 --- /dev/null +++ b/sim/testsuite/riscv/pass-rv32e.s @@ -0,0 +1,10 @@ +# check that the sim doesn't die immediately. +# mach: riscv32 +# sim(riscv32): --model RV32EC +# ld(riscv32): -m elf32lriscv +# as(riscv32): -march=rv32ec + +.include "testutils-e.inc" + + start + pass diff --git a/sim/testsuite/riscv/pass.s b/sim/testsuite/riscv/pass.s index a188b83a026..41643d521ee 100644 --- a/sim/testsuite/riscv/pass.s +++ b/sim/testsuite/riscv/pass.s @@ -1,7 +1,13 @@ # check that the sim doesn't die immediately. # mach: riscv32 riscv64 +# sim(riscv32): --model RV32IC +# sim(riscv64): --model RV64IC +# ld(riscv32): -m elf32lriscv +# ld(riscv64): -m elf64lriscv +# as(riscv32): -march=rv32ic +# as(riscv64): -march=rv64ic -.include "testutils.inc" +.include "testutils-i.inc" start pass diff --git a/sim/testsuite/riscv/testutils-e.inc b/sim/testsuite/riscv/testutils-e.inc new file mode 100644 index 00000000000..b0df340dc89 --- /dev/null +++ b/sim/testsuite/riscv/testutils-e.inc @@ -0,0 +1,58 @@ +# MACRO: exit + .macro exit nr + li a0, \nr + # The exit utility function. + li t0, 93; + # Trigger OS trap. + ecall; + .endm + +# MACRO: pass +# Write 'pass' to stdout and quit. + .macro pass + # syscall write(). + li t0, 64; + # Use stdout. + li a0, 1; + # Point to the string. + lla a1, 1f; + # Number of bytes to write. + li a2, 5; + # Trigger OS trap. + ecall; + exit 0; + .pushsection .data + 1: .asciz "pass\n" + .popsection + .endm + +# MACRO: fail +# Write 'fail' to stdout and quit. + .macro fail + # syscall write(). + li t0, 64; + # Use stdout. + li a0, 1; + # Point to the string. + la a1, 1f; + # Number of bytes to write. + li a2, 5; + # Trigger OS trap. + ecall; + exit 0; + .pushsection .data + 1: .asciz "fail\n" + .popsection + .endm + +# MACRO: start +# All assembler tests should start with a call to "start". + .macro start + .text +.global _start +_start: + .option push + .option norelax + lla gp, __global_pointer$ + .option pop + .endm diff --git a/sim/testsuite/riscv/testutils.inc b/sim/testsuite/riscv/testutils-i.inc similarity index 100% rename from sim/testsuite/riscv/testutils.inc rename to sim/testsuite/riscv/testutils-i.inc -- 2.47.0