From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id oJTJASt3hmbUChsAWB0awg (envelope-from ) for ; Thu, 04 Jul 2024 06:19:23 -0400 Authentication-Results: simark.ca; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=nhugfPEw; dkim-atps=neutral Received: by simark.ca (Postfix, from userid 112) id 032A41E0C3; Thu, 4 Jul 2024 06:19:23 -0400 (EDT) Received: from server2.sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id DEEDA1E097 for ; Thu, 4 Jul 2024 06:19:20 -0400 (EDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 8ACFF384A45E for ; Thu, 4 Jul 2024 10:19:20 +0000 (GMT) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.18]) by sourceware.org (Postfix) with ESMTPS id 5061A384A80B for ; Thu, 4 Jul 2024 10:18:48 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 5061A384A80B Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 5061A384A80B Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.18 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1720088332; cv=none; b=cUy+rVWxFCpd0InSudNa3pX2IPLfkCR/O/2SB05nCBpCeWljm1r8EdQvEbv4zI6dTGPHGk3pCpNZJxTIohEwNUeP6feUhQkikrXn9JPUX/1Y4rWEk1hsZ3ZJOPEgPxKFM4aeiZJoKpvOFOg4GNBw8/YA/4x5omBqkxj9TvTnBJE= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1720088332; c=relaxed/simple; bh=96qSpoZkw042rTKTZ1kGA78u26EXzzkuavCEW3z4i3o=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=NEKGMTMnshOrbCum/7FnOiwvf34qPuwrrtyhOUCj6eqLsSKKxLqzNekGP9bQogOte58M8rQhHFTJn6M6CSsoBfWiQReRl0zWlBzNc6whVmmjHW+iBy69K9aaoJyAzar/2r00T79sOJWnBhE3F8TsQB9idg5yxXpJxaDh5rhJsdg= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1720088329; x=1751624329; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=96qSpoZkw042rTKTZ1kGA78u26EXzzkuavCEW3z4i3o=; b=nhugfPEwNZQcoMjuVjEDlM4XxqBhzVIMLKflkYwNe8WSSLW/87d+v4Nz vDBSkGc9IM49tWt1abdTd+CdIEJ/tZDLX8Xt2KZszddhjGiKX/Kbzae6N ToeIdGqZvOF4iOPIbzkmjsyGpmdKRZQYKvAKoZZZrVASC1hI1edr2fzh2 p64xpji2o8hxp1xGcuooE3g1sTH14Z4CRjJjvYYGLdlsCD1QLnUzrezqU wthRcE7jGlwDPtfqZmHKnfI8WsvtsnBJoIrV75AAo3BgyXE59EyLl9TBR tVjMg+cJl7TEXG1XzY/elegtj9q1EuvuzdoTHPGkFSPv2zXHXjI5kp09N Q==; X-CSE-ConnectionGUID: DWu7hCcSTIagBM+cm3Rcaw== X-CSE-MsgGUID: Jt35xatAT3CyY+sL2FkmLA== X-IronPort-AV: E=McAfee;i="6700,10204,11122"; a="17501304" X-IronPort-AV: E=Sophos;i="6.09,183,1716274800"; d="scan'208";a="17501304" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Jul 2024 03:18:49 -0700 X-CSE-ConnectionGUID: 0SX7wM/7RCSZGRbU5AzFwQ== X-CSE-MsgGUID: rE3JKIXFTi+drudFow4T8g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,183,1716274800"; d="scan'208";a="50999813" Received: from gkldtt-dev-004.igk.intel.com (HELO localhost) ([10.123.221.202]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Jul 2024 03:18:47 -0700 From: "Schimpe, Christina" To: gdb-patches@sourceware.org Cc: felix.willgerodt@intel.com, luis.machado@arm.com Subject: [PATCH v4 2/2] LAM: Enable tagged pointer support for watchpoints. Date: Thu, 4 Jul 2024 10:17:36 +0000 Message-Id: <20240704101736.3074236-3-christina.schimpe@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240704101736.3074236-1-christina.schimpe@intel.com> References: <20240704101736.3074236-1-christina.schimpe@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-10.1 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces~public-inbox=simark.ca@sourceware.org From: Christina Schimpe The Intel (R) linear address masking (LAM) feature modifies the checking applied to 64-bit linear addresses. With this so-called "modified canonicality check" the processor masks the metadata bits in a pointer before using it as a linear address. LAM supports two different modes that differ regarding which pointer bits are masked and can be used for metadata: LAM 48 resulting in a LAM width of 15 and LAM 57 resulting in a LAM width of 6. This patch adjusts watchpoint addresses based on the currently enabled LAM mode using the untag mask provided in the /proc//status file. As LAM can be enabled at runtime or as the configuration may change when entering an enclave, GDB checks enablement state each time a watchpoint is updated. In contrast to the patch implemented for ARM's Top Byte Ignore "Clear non-significant bits of address on memory access", it is not necessary to adjust addresses before they are passed to the target layer cache, as for LAM tagged pointers are supported by the system call to read memory. Additionally, LAM applies only to addresses used for data accesses. Thus, it is sufficient to mask addresses used for watchpoints. The following examples are based on a LAM57 enabled program. Before this patch tagged pointers were not supported for watchpoints: ~~~ (gdb) print pi_tagged $2 = (int *) 0x10007ffffffffe004 (gdb) watch *pi_tagged Hardware watchpoint 2: *pi_tagged (gdb) c Continuing. Couldn't write debug register: Invalid argument. ~~~~ Once LAM 48 or LAM 57 is enabled for the current program, GDB can now specify watchpoints for tagged addresses with LAM width 15 or 6, respectively. --- gdb/NEWS | 2 + gdb/amd64-linux-tdep.c | 64 ++++++++++++++++++++++++++++ gdb/testsuite/gdb.arch/amd64-lam.c | 49 +++++++++++++++++++++ gdb/testsuite/gdb.arch/amd64-lam.exp | 46 ++++++++++++++++++++ gdb/testsuite/lib/gdb.exp | 63 +++++++++++++++++++++++++++ 5 files changed, 224 insertions(+) create mode 100755 gdb/testsuite/gdb.arch/amd64-lam.c create mode 100644 gdb/testsuite/gdb.arch/amd64-lam.exp diff --git a/gdb/NEWS b/gdb/NEWS index 47677cb773a..fcbb89e8bf8 100644 --- a/gdb/NEWS +++ b/gdb/NEWS @@ -3,6 +3,8 @@ *** Changes since GDB 15 +* GDB now supports watchpoints for tagged data pointers on amd64. + * Debugger Adapter Protocol changes ** The "scopes" request will now return a scope holding global diff --git a/gdb/amd64-linux-tdep.c b/gdb/amd64-linux-tdep.c index d7662cac572..88e14251d7d 100644 --- a/gdb/amd64-linux-tdep.c +++ b/gdb/amd64-linux-tdep.c @@ -43,6 +43,7 @@ #include "target-descriptions.h" #include "expop.h" #include "arch/amd64-linux-tdesc.h" +#include "inferior.h" /* The syscall's XML filename for i386. */ #define XML_SYSCALL_FILENAME_AMD64 "syscalls/amd64-linux.xml" @@ -50,6 +51,10 @@ #include "record-full.h" #include "linux-record.h" +#include + +#define DEFAULT_TAG_MASK 0xffffffffffffffffULL + /* Mapping between the general-purpose registers in `struct user' format and GDB's register cache layout. */ @@ -1765,6 +1770,62 @@ amd64_dtrace_parse_probe_argument (struct gdbarch *gdbarch, } } +/* Extract the untagging mask based on the currently active linear address + masking (LAM) mode, which is stored in the /proc//status file. + If we cannot extract the untag mask (for example, if we don't have + execution), we assume address tagging is not enabled and return the + DEFAULT_TAG_MASK. */ + +static CORE_ADDR +amd64_linux_lam_untag_mask () +{ + if (!target_has_execution ()) + return DEFAULT_TAG_MASK; + + inferior *inf = current_inferior (); + if (inf->fake_pid_p) + return DEFAULT_TAG_MASK; + + const std::string filename = string_printf ("/proc/%d/status", inf->pid); + gdb::unique_xmalloc_ptr status_file + = target_fileio_read_stralloc (nullptr, filename.c_str ()); + + if (status_file == nullptr) + return DEFAULT_TAG_MASK; + + std::string_view status_file_view (status_file.get ()); + constexpr std::string_view untag_mask_str = "untag_mask:\t"; + const size_t found = status_file_view.find (untag_mask_str); + if (found != std::string::npos) + { + const char* start = status_file_view.data() + found + + untag_mask_str.length (); + char* endptr; + errno = 0; + unsigned long long result = std::strtoul (start, &endptr, 0); + if (errno != 0 || endptr == start) + error (_("Failed to parse untag_mask from file %s."), + std::string (filename).c_str ()); + + return result; + } + + return DEFAULT_TAG_MASK; +} + +/* Adjust watchpoint address based on the currently active linear address + masking (LAM) mode using the untag mask. Check each time for a new + mask, as LAM is enabled at runtime. */ + +static CORE_ADDR +amd64_linux_remove_non_address_bits_watchpoint (gdbarch *gdbarch, + CORE_ADDR addr) +{ + /* Clear insignificant bits of a target address using the untag + mask. */ + return (addr & amd64_linux_lam_untag_mask ()); +} + static void amd64_linux_init_abi_common(struct gdbarch_info info, struct gdbarch *gdbarch, int num_disp_step_buffers) @@ -1819,6 +1880,9 @@ amd64_linux_init_abi_common(struct gdbarch_info info, struct gdbarch *gdbarch, set_gdbarch_get_siginfo_type (gdbarch, x86_linux_get_siginfo_type); set_gdbarch_report_signal_info (gdbarch, i386_linux_report_signal_info); + + set_gdbarch_remove_non_address_bits_watchpoint + (gdbarch, amd64_linux_remove_non_address_bits_watchpoint); } static void diff --git a/gdb/testsuite/gdb.arch/amd64-lam.c b/gdb/testsuite/gdb.arch/amd64-lam.c new file mode 100755 index 00000000000..0fe2bc6c2ad --- /dev/null +++ b/gdb/testsuite/gdb.arch/amd64-lam.c @@ -0,0 +1,49 @@ +/* This testcase is part of GDB, the GNU debugger. + + Copyright 2023-2024 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#define _GNU_SOURCE +#include +#include +#include +#include +#include +#include +#include + +int +main (int argc, char **argv) +{ + int i; + int* pi = &i; + int* pi_tagged; + + /* Enable LAM 57. */ + errno = 0; + syscall (SYS_arch_prctl, ARCH_ENABLE_TAGGED_ADDR, 6); + assert_perror (errno); + + /* Add tagging at bit 61. */ + pi_tagged = (int *) ((uintptr_t) pi | (1LL << 60)); + + i = 0; /* Breakpoint here. */ + *pi = 1; + *pi_tagged = 2; + *pi = 3; + *pi_tagged = 4; + + return 0; +} diff --git a/gdb/testsuite/gdb.arch/amd64-lam.exp b/gdb/testsuite/gdb.arch/amd64-lam.exp new file mode 100644 index 00000000000..0bcbb639b66 --- /dev/null +++ b/gdb/testsuite/gdb.arch/amd64-lam.exp @@ -0,0 +1,46 @@ +# Copyright 2023-2024 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# Test Linear Address Masking (LAM) support. + +require allow_lam_tests + +standard_testfile amd64-lam.c + +# Test LAM 57. +if { [prepare_for_testing "failed to prepare" ${testfile} ${srcfile}] } { + return -1 +} + +if { ![runto_main] } { + return -1 +} + +gdb_breakpoint [gdb_get_line_number "Breakpoint here"] +gdb_continue_to_breakpoint "Breakpoint here" + +# Test hw watchpoint for a tagged and an untagged address with hit on a +# tagged and an untagged address each. + +foreach symbol {"pi" "pi_tagged"} { + gdb_test "watch *${symbol}" + gdb_test "continue" \ + "Continuing\\..*Hardware watchpoint \[0-9\]+.*" \ + "run until watchpoint on ${symbol}" + gdb_test "continue" \ + "Continuing\\..*Hardware watchpoint \[0-9\]+.*" \ + "run until watchpoint on ${symbol}, 2nd hit" + delete_breakpoints +} diff --git a/gdb/testsuite/lib/gdb.exp b/gdb/testsuite/lib/gdb.exp index dfe19c9410d..4cfda74fc43 100644 --- a/gdb/testsuite/lib/gdb.exp +++ b/gdb/testsuite/lib/gdb.exp @@ -4154,6 +4154,69 @@ gdb_caching_proc allow_avx512fp16_tests {} { return $allow_avx512fp16_tests } +# Run a test on the target to see if it supports LAM 57. Return 1 if so, +# 0 if it does not. Based on the arch_prctl() handle ARCH_ENABLE_TAGGED_ADDR +# to enable LAM which fails if the hardware or the OS does not support LAM. + +gdb_caching_proc allow_lam_tests {} { + global gdb_prompt inferior_exited_re + + set me "allow_lam_tests" + if { ![istarget "x86_64-*-*"] } { + verbose "$me: target does not support LAM, returning 1" 2 + return 0 + } + + # Compile a test program. + set src { + #define _GNU_SOURCE + #include + #include + #include + #include + + int configure_lam () + { + errno = 0; + syscall (SYS_arch_prctl, ARCH_ENABLE_TAGGED_ADDR, 6); + assert_perror (errno); + return errno; + } + + int + main () { return configure_lam (); } + } + + if {![gdb_simple_compile $me $src executable ""]} { + return 0 + } + # No error message, compilation succeeded so now run it via gdb. + + set allow_lam_tests 0 + clean_restart $obj + gdb_run_cmd + gdb_expect { + -re ".*$inferior_exited_re with code.*${gdb_prompt} $" { + verbose -log "$me: LAM support not detected." + } + -re ".*Program received signal SIGABRT, Aborted.*${gdb_prompt} $" { + verbose -log "$me: LAM support not detected." + } + -re ".*$inferior_exited_re normally.*${gdb_prompt} $" { + verbose -log "$me: LAM support detected." + set allow_lam_tests 1 + } + default { + warning "\n$me: default case taken." + } + } + gdb_exit + remote_file build delete $obj + + verbose "$me: returning $allow_lam_tests" 2 + return $allow_lam_tests +} + # Run a test on the target to see if it supports btrace hardware. Return 1 if so, # 0 if it does not. Based on 'check_vmx_hw_available' from the GCC testsuite. -- 2.34.1 Intel Deutschland GmbH Registered Address: Am Campeon 10, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Sean Fennelly, Jeffrey Schneiderman, Tiffany Doon Silva Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928