From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id 8DGNG4hfVGbZZB4AWB0awg (envelope-from ) for ; Mon, 27 May 2024 06:25:12 -0400 Authentication-Results: simark.ca; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=XUE97o3M; dkim-atps=neutral Received: by simark.ca (Postfix, from userid 112) id 5BAEA1E0C1; Mon, 27 May 2024 06:25:12 -0400 (EDT) Received: from server2.sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id EB3921E092 for ; Mon, 27 May 2024 06:25:09 -0400 (EDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id D25243858D28 for ; Mon, 27 May 2024 10:25:08 +0000 (GMT) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.14]) by sourceware.org (Postfix) with ESMTPS id 504213858D28 for ; Mon, 27 May 2024 10:24:40 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 504213858D28 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 504213858D28 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=192.198.163.14 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1716805482; cv=none; b=F3oUjjDd6JFKXrcjlDvyitIGUbQr2to6N7AEhNsbRo9fc3tdpkMZjriaihbXbE9b+wFZ1mlQUqLJNjbLsb6apSKVXIo1/qOi4kWUsyhkibnLjD9Bpoww1co+pgg+IS1n2XDK1vvj+cBnQXO5dUqH/PRHoxfskiyI+z9Dkeu42OY= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1716805482; c=relaxed/simple; bh=ow/hfMUGK4G8SN1MNNY1A2hs3hXsKdzF1FyHayZy680=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=IjXh7Tu7q7tpaVgEzJ3VMvqQKUkyUqU9UDyDuRyJdVpnLpXCL/F6jgGuWU6ye61PkvDLPmn7bZfBoLWJJc1n1puinwnSVA+VV+cqqmhxHG9uO11C1cRp5hTlHR46gZxAInaYbpygQUGLFoGcfG7DPY/enpp76ylx12YsDAtuzaY= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716805480; x=1748341480; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=ow/hfMUGK4G8SN1MNNY1A2hs3hXsKdzF1FyHayZy680=; b=XUE97o3Mzsvni/N1Rq3UA+jg5h59IAI4nbhRgtG6iM6qUsDSm5hx61cs kLTiSq8kdsnCUtsqsOv4gwnu7yucRaYd9B4BiPSaHEjpj8+NPoRpXvIxo 0L6BcDAUvDeaD/0P0tO0u8L8RhbSfMRdr4c/RGEjE8MyEdPGBZWSZywxz EmGZPToP3FNG07fS38tVDsdIEwllBwyzIFb64PPvKS3T9TRUj0gOfxEPN o3yIctCYJMl6Lr4+eg8nTPPJ5dS8FngDbsYk8VICmKCDKn3gmgG0m6qZg 8yhoxAr04wZagun+rAtEM9f9ZFD8QNtM+YwnBT6riOcOXHsEgjPjNO+HR A==; X-CSE-ConnectionGUID: 8osC+yWQQaaSe/UN8SFy3g== X-CSE-MsgGUID: 9kLPAdyRR4+Sxp2mrlfDig== X-IronPort-AV: E=McAfee;i="6600,9927,11084"; a="13340976" X-IronPort-AV: E=Sophos;i="6.08,192,1712646000"; d="scan'208";a="13340976" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa108.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 May 2024 03:24:39 -0700 X-CSE-ConnectionGUID: m3CnZcL8SJaR/yHOCz+v8w== X-CSE-MsgGUID: C9nDOXYKSeyBaH5dsHPsEg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,192,1712646000"; d="scan'208";a="34631980" Received: from gkldtt-dev-004.igk.intel.com (HELO localhost) ([10.123.221.202]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 May 2024 03:24:37 -0700 From: "Schimpe, Christina" To: gdb-patches@sourceware.org Cc: felix.willgerodt@intel.com, eliz@gnu.org, luis.machado@arm.com Subject: [PATCH v2 0/3] Add amd64 LAM watchpoint support Date: Mon, 27 May 2024 10:24:20 +0000 Message-Id: <20240527102423.1361410-1-christina.schimpe@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-3.9 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces+public-inbox=simark.ca@sourceware.org Hi all, this is my v2 of the series "Add amd64 LAM watchpoint support". It implements the feedback of Luis and Felix. The NEWS part has already been approved by Eli. Also I noticed that the gdbarch function 'gdbarch_remove_non_addr_bits_memory' should not be used in several functions of aarch64* files (patch 1) due to the following: The function description for 'gdbarch_remove_non_addr_bits_memory' states: "Given a pointer for the architecture, this hook removes all the non-significant bits and sign-extends things as needed. It gets used to remove non-address bits from any pointer used to access memory. " We don't know if the pointer passed to 'gdbarch_remove_non_addr_bits_memory' by 'gdbarch_tagged_address_p' will be used to access memory. That's why it's wrong to call this function in 'gdbarch_tagged_address_p'. There are several similar wrong calls of 'gdbarch_remove_non_addr_bits_memory' in the changes of patch 1. I replaced all of them with 'aarch64_remove_non_address_bits'. Changes since V1: * Replace gdbarch_remove_non_addr_bits_memory with aarch64_remove_non_address_bits in aarch64* files. * Improve comments and commit messages. * Move 'allow_lam_tests' procedure in gdb.exp to the correct location. * Remove abbreviations in gdbarch function names. * Update copyright years. V1 of this series can be found here: https://sourceware.org/pipermail/gdb-patches/2024-March/207589.html I am looking forward to your feedback. Thanks + Best Regards, Christina Christina Schimpe (3): gdb: Make tagged pointer support configurable. LAM: Enable tagged pointer support for watchpoints. LAM: Support kernel space debugging gdb/NEWS | 2 + gdb/aarch64-linux-nat.c | 2 +- gdb/aarch64-linux-tdep.c | 13 ++--- gdb/aarch64-tdep.c | 17 ++++--- gdb/aarch64-tdep.h | 6 +++ gdb/amd64-linux-tdep.c | 75 ++++++++++++++++++++++++++++ gdb/breakpoint.c | 5 +- gdb/gdbarch-gen.h | 49 ++++++++++++++---- gdb/gdbarch.c | 66 ++++++++++++++++++++---- gdb/gdbarch_components.py | 53 +++++++++++++++++--- gdb/target.c | 3 +- gdb/testsuite/gdb.arch/amd64-lam.c | 49 ++++++++++++++++++ gdb/testsuite/gdb.arch/amd64-lam.exp | 46 +++++++++++++++++ gdb/testsuite/lib/gdb.exp | 63 +++++++++++++++++++++++ 14 files changed, 402 insertions(+), 47 deletions(-) create mode 100755 gdb/testsuite/gdb.arch/amd64-lam.c create mode 100644 gdb/testsuite/gdb.arch/amd64-lam.exp -- 2.34.1 Intel Deutschland GmbH Registered Address: Am Campeon 10, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Sean Fennelly, Jeffrey Schneiderman, Tiffany Doon Silva Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928