[PATCH 02/20] sim: aarch64: move arch-specific settings to internal header

Mike Frysinger via Gdb-patches
2022-12-23T06:08:24Z

with common/ sim code, so move it all out to a new header which only
this port will include.

While we're here, drop redundant includes from sim-main.h:
* sim-types.h is included by sim-base.h already
* sim-base.h is included twice
* sim-io.h is included by sim-base.h already
---
sim/aarch64/aarch64-sim.h | 60 +++++++++++++++++++++++++++++++++++++++
sim/aarch64/cpustate.c | 2 ++
sim/aarch64/cpustate.h | 1 +
sim/aarch64/interp.c | 2 ++
sim/aarch64/sim-main.h | 35 -----------------------
sim/aarch64/simulator.c | 1 +
6 files changed, 66 insertions(+), 35 deletions(-)
create mode 100644 sim/aarch64/aarch64-sim.h

diff --git a/sim/aarch64/aarch64-sim.h b/sim/aarch64/aarch64-sim.h
new file mode 100644
index 000000000000..fe3820ffe09c
--- /dev/null
+++ b/sim/aarch64/aarch64-sim.h
@@ -0,0 +1,60 @@
+/* aarch64-sim.h -- Internal aarch64 settings.
+
+ Copyright (C) 2015-2022 Free Software Foundation, Inc.
+
+ Contributed by Red Hat.
+
+ This file is part of the GNU simulators.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+#ifndef AARCH64_SIM_H
+#define AARCH64_SIM_H
+
+#include <stdint.h>
+
+#include "cpustate.h"
+
+/* A per-core state structure. */
+struct aarch64_sim_cpu
+{
+ GRegister gr[33]; /* Extra register at index 32 is used to hold zero value. */
+ FRegister fr[32];
+
+ uint64_t pc;
+ uint32_t CPSR;
+ uint32_t FPSR; /* Floating point Status register. */
+ uint32_t FPCR; /* Floating point Control register. */
+
+ uint64_t nextpc;
+ uint32_t instr;
+
+ uint64_t tpidr; /* Thread pointer id. */
+};
+
+#define AARCH64_SIM_CPU(cpu) ((struct aarch64_sim_cpu *) CPU_ARCH_DATA (cpu))
+
+typedef enum
+{
+ AARCH64_MIN_GR = 0,
+ AARCH64_MAX_GR = 31,
+ AARCH64_MIN_FR = 32,
+ AARCH64_MAX_FR = 63,
+ AARCH64_PC_REGNO = 64,
+ AARCH64_CPSR_REGNO = 65,
+ AARCH64_FPSR_REGNO = 66,
+ AARCH64_MAX_REGNO = 67
+} aarch64_regno;
+
+#endif /* AARCH64_SIM_H */
diff --git a/sim/aarch64/cpustate.c b/sim/aarch64/cpustate.c
index 24be34c49d9a..05f0d26f90a5 100644
--- a/sim/aarch64/cpustate.c
+++ b/sim/aarch64/cpustate.c
@@ -31,6 +31,8 @@
#include "simulator.h"
#include "libiberty.h"

+#include "aarch64-sim.h"
+
/* Some operands are allowed to access the stack pointer (reg 31).
For others a read from r31 always returns 0, and a write to r31 is ignored. */
#define reg_num(reg) (((reg) == R31 && !r31_is_sp) ? 32 : (reg))
diff --git a/sim/aarch64/cpustate.h b/sim/aarch64/cpustate.h
index 95c9d561fdb7..fe2a5819456e 100644
--- a/sim/aarch64/cpustate.h
+++ b/sim/aarch64/cpustate.h
@@ -27,6 +27,7 @@
#include <inttypes.h>

#include "sim/sim.h"
+#include "sim-main.h"

/* Symbolic names used to identify general registers which also match
the registers indices in machine code.
diff --git a/sim/aarch64/interp.c b/sim/aarch64/interp.c
index 99e84aa0adc6..234d978a7685 100644
--- a/sim/aarch64/interp.c
+++ b/sim/aarch64/interp.c
@@ -42,6 +42,8 @@
#include "simulator.h"
#include "sim-assert.h"

+#include "aarch64-sim.h"
+
/* Filter out (in place) symbols that are useless for disassembly.
COUNT is the number of elements in SYMBOLS.
Return the number of useful symbols. */
diff --git a/sim/aarch64/sim-main.h b/sim/aarch64/sim-main.h
index 211685f8864b..6b8da2df1f9a 100644
--- a/sim/aarch64/sim-main.h
+++ b/sim/aarch64/sim-main.h
@@ -23,41 +23,6 @@
#define _SIM_MAIN_H

#include "sim-basics.h"
-#include "sim-types.h"
#include "sim-base.h"
-#include "sim-base.h"
-#include "sim-io.h"
-#include "cpustate.h"
-
-/* A per-core state structure. */
-struct aarch64_sim_cpu
-{
- GRegister gr[33]; /* Extra register at index 32 is used to hold zero value. */
- FRegister fr[32];
-
- uint64_t pc;
- uint32_t CPSR;
- uint32_t FPSR; /* Floating point Status register. */
- uint32_t FPCR; /* Floating point Control register. */
-
- uint64_t nextpc;
- uint32_t instr;
-
- uint64_t tpidr; /* Thread pointer id. */
-};
-
-#define AARCH64_SIM_CPU(cpu) ((struct aarch64_sim_cpu *) CPU_ARCH_DATA (cpu))
-
-typedef enum
-{
- AARCH64_MIN_GR = 0,
- AARCH64_MAX_GR = 31,
- AARCH64_MIN_FR = 32,
- AARCH64_MAX_FR = 63,
- AARCH64_PC_REGNO = 64,
- AARCH64_CPSR_REGNO = 65,
- AARCH64_FPSR_REGNO = 66,
- AARCH64_MAX_REGNO = 67
-} aarch64_regno;

#endif /* _SIM_MAIN_H */
diff --git a/sim/aarch64/simulator.c b/sim/aarch64/simulator.c
index 0a4fde1a9b26..6818e9731160 100644
--- a/sim/aarch64/simulator.c
+++ b/sim/aarch64/simulator.c
@@ -30,6 +30,7 @@
#include <time.h>
#include <limits.h>

+#include "aarch64-sim.h"
#include "simulator.h"
#include "cpustate.h"
#include "memory.h"
--
2.39.0