From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id gCOQCL9FpWMfsgcAWB0awg (envelope-from ) for ; Fri, 23 Dec 2022 01:07:59 -0500 Received: by simark.ca (Postfix, from userid 112) id 1FC901E222; Fri, 23 Dec 2022 01:07:59 -0500 (EST) Authentication-Results: simark.ca; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.a=rsa-sha256 header.s=default header.b=rT4o35B9; dkim-atps=neutral X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on simark.ca X-Spam-Level: X-Spam-Status: No, score=-8.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id BF17B1E110 for ; Fri, 23 Dec 2022 01:07:58 -0500 (EST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 40204384E7B1 for ; Fri, 23 Dec 2022 06:07:57 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 40204384E7B1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1671775677; bh=5drF24gfdaL33Zc2O9g+L2PchsOFj7q+5oYopyxaq7A=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=rT4o35B9jpQRRitb8TKMAdZb3JWmfnmvJxMdGCKdcRakbUMvkSZu/BP5+TjP5xq1Y gOnwdvKAmXHSxt1+tOpMuK9SazdQV7eSAqSV5zi9ingZEqxln06TE9htlRe/D9wusl TQnIVK4utN7hwmM43k59hkYcsqgc2kQrMWo+Vlfk= Received: from smtp.gentoo.org (smtp.gentoo.org [IPv6:2001:470:ea4a:1:5054:ff:fec7:86e4]) by sourceware.org (Postfix) with ESMTP id 50A6B385B530 for ; Fri, 23 Dec 2022 06:07:28 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 50A6B385B530 Received: by smtp.gentoo.org (Postfix, from userid 559) id 018693411D4; Fri, 23 Dec 2022 06:07:28 +0000 (UTC) To: gdb-patches@sourceware.org Subject: [PATCH 05/20] sim: d10v: move arch-specific settings to internal header Date: Fri, 23 Dec 2022 01:06:58 -0500 Message-Id: <20221223060713.28821-6-vapier@gentoo.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221223060713.28821-1-vapier@gentoo.org> References: <20221223060713.28821-1-vapier@gentoo.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Mike Frysinger via Gdb-patches Reply-To: Mike Frysinger Errors-To: gdb-patches-bounces+public-inbox=simark.ca@sourceware.org Sender: "Gdb-patches" There's no need for these settings to be in sim-main.h which is shared with common/ sim code, so drop the d10v_sim.h include and move it to the few files that actually need it. Also rename the file to standardize it a bit better with other ports. --- sim/d10v/{d10v_sim.h => d10v-sim.h} | 5 +++++ sim/d10v/endian.c | 4 +++- sim/d10v/gencode.c | 3 ++- sim/d10v/interp.c | 2 ++ sim/d10v/sim-main.h | 2 -- sim/d10v/simops.c | 2 ++ 6 files changed, 14 insertions(+), 4 deletions(-) rename sim/d10v/{d10v_sim.h => d10v-sim.h} (99%) diff --git a/sim/d10v/d10v_sim.h b/sim/d10v/d10v-sim.h similarity index 99% rename from sim/d10v/d10v_sim.h rename to sim/d10v/d10v-sim.h index e78ea2fe9df8..df12fe2757e6 100644 --- a/sim/d10v/d10v_sim.h +++ b/sim/d10v/d10v-sim.h @@ -1,3 +1,6 @@ +#ifndef D10V_SIM_H +#define D10V_SIM_H + #include #include #include @@ -476,3 +479,5 @@ extern void write_longlong (uint8_t *addr, int64_t data); PSW is masked for zero bits. */ extern reg_t move_to_cr (SIM_DESC, SIM_CPU *, int cr, reg_t mask, reg_t val, int psw_hw_p); + +#endif diff --git a/sim/d10v/endian.c b/sim/d10v/endian.c index 44e80e6d6530..e6212babdaa9 100644 --- a/sim/d10v/endian.c +++ b/sim/d10v/endian.c @@ -1,5 +1,5 @@ /* If we're being compiled as a .c file, rather than being included in - d10v_sim.h, then ENDIAN_INLINE won't be defined yet. */ + d10v-sim.h, then ENDIAN_INLINE won't be defined yet. */ /* This must come before any other includes. */ #include "defs.h" @@ -10,6 +10,8 @@ #define ENDIAN_INLINE #endif +#include "d10v-sim.h" + ENDIAN_INLINE uint16_t get_word (const uint8_t *x) { diff --git a/sim/d10v/gencode.c b/sim/d10v/gencode.c index 6e006d089a67..3a37bac62563 100644 --- a/sim/d10v/gencode.c +++ b/sim/d10v/gencode.c @@ -42,7 +42,7 @@ write_template (void) struct d10v_opcode *opcode; int i,j; - printf ("#include \"sim-main.h\"\n"); + printf ("#include \"d10v-sim.h\"\n"); printf ("#include \"simops.h\"\n"); for (opcode = (struct d10v_opcode *)d10v_opcodes; opcode->name; opcode++) @@ -103,6 +103,7 @@ write_opcodes (void) /* write out opcode table */ printf ("#include \"sim-main.h\"\n"); + printf ("#include \"d10v-sim.h\"\n"); printf ("#include \"simops.h\"\n\n"); printf ("struct simops Simops[] = {\n"); diff --git a/sim/d10v/interp.c b/sim/d10v/interp.c index ae8b6707ed4b..9beedf8f445e 100644 --- a/sim/d10v/interp.c +++ b/sim/d10v/interp.c @@ -18,6 +18,8 @@ #include #include +#include "d10v-sim.h" + #include "target-newlib-syscall.h" enum _leftright { LEFT_FIRST, RIGHT_FIRST }; diff --git a/sim/d10v/sim-main.h b/sim/d10v/sim-main.h index 4e6771af70fc..3e0b74c63a40 100644 --- a/sim/d10v/sim-main.h +++ b/sim/d10v/sim-main.h @@ -22,6 +22,4 @@ #include "sim-basics.h" #include "sim-base.h" -#include "d10v_sim.h" - #endif diff --git a/sim/d10v/simops.c b/sim/d10v/simops.c index a2eb3677e7e2..96ed29f6abe1 100644 --- a/sim/d10v/simops.c +++ b/sim/d10v/simops.c @@ -17,6 +17,8 @@ #include "simops.h" #include "target-newlib-syscall.h" +#include "d10v-sim.h" + #define EXCEPTION(sig) sim_engine_halt (sd, cpu, NULL, PC, sim_stopped, sig) enum op_types { -- 2.39.0