[PATCH 17/20] sim: sh: move arch-specific settings to internal header

Mike Frysinger via Gdb-patches
2022-12-23T06:09:26Z

with common/ sim code, so move it all out to a new header which only
this port will include.
---
sim/sh/interp.c | 2 +
sim/sh/sh-sim.h | 118 ++++++++++++++++++++++++++++++++++++++++++++++
sim/sh/sim-main.h | 96 -------------------------------------
3 files changed, 120 insertions(+), 96 deletions(-)
create mode 100644 sim/sh/sh-sim.h

diff --git a/sim/sh/interp.c b/sim/sh/interp.c
index 7784ca7aa40f..b2d30e386c1a 100644
--- a/sim/sh/interp.c
+++ b/sim/sh/interp.c
@@ -63,6 +63,8 @@

#include "target-newlib-syscall.h"

+#include "sh-sim.h"
+
#include <math.h>

#ifdef _WIN32
diff --git a/sim/sh/sh-sim.h b/sim/sh/sh-sim.h
new file mode 100644
index 000000000000..7f315b780af0
--- /dev/null
+++ b/sim/sh/sh-sim.h
@@ -0,0 +1,118 @@
+/* Moxie Simulator definition.
+ Copyright (C) 2009-2022 Free Software Foundation, Inc.
+
+This file is part of the GNU simulators.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+#ifndef SH_SIM_H
+#define SH_SIM_H
+
+typedef struct
+{
+ int regs[20];
+} regstacktype;
+
+typedef union
+{
+
+ struct
+ {
+ int regs[16];
+ int pc;
+
+ /* System registers. For sh-dsp this also includes A0 / X0 / X1 / Y0 / Y1
+ which are located in fregs. Probably should include pc too - to avoid
+ alignment repercussions. */
+ union {
+ struct {
+ int mach;
+ int macl;
+ int pr;
+ int dummy3, dummy4;
+ int fpul; /* A1 for sh-dsp - but only for movs etc. */
+ int fpscr; /* dsr for sh-dsp */
+
+ /* sh3e / sh-dsp */
+ union fregs_u {
+ float f[16];
+ double d[8];
+ int i[16];
+ } fregs[2];
+ };
+ int sregs[39];
+ };
+
+ /* Control registers; on the SH4, ldc / stc is privileged, except when
+ accessing gbr. */
+ union
+ {
+ struct
+ {
+ int sr;
+ int gbr;
+ int vbr;
+ int ssr;
+ int spc;
+ int mod;
+ /* sh-dsp */
+ int rs;
+ int re;
+ /* sh3 */
+ int bank[8];
+ int dbr; /* debug base register */
+ int sgr; /* saved gr15 */
+ int ldst; /* load/store flag (boolean) */
+ int tbr;
+ int ibcr; /* sh2a bank control register */
+ int ibnr; /* sh2a bank number register */
+ };
+ int cregs[16];
+ };
+
+ unsigned char *insn_end;
+
+ int ticks;
+ int stalls;
+ int memstalls;
+ int cycles;
+ int insts;
+
+ int prevlock;
+ int thislock;
+ int exception;
+
+ int end_of_registers;
+
+ int msize;
+#define PROFILE_FREQ 1
+#define PROFILE_SHIFT 2
+ int profile;
+ unsigned short *profile_hist;
+ unsigned char *memory;
+ int xyram_select, xram_start, yram_start;
+ unsigned char *xmem;
+ unsigned char *ymem;
+ unsigned char *xmem_offset;
+ unsigned char *ymem_offset;
+ unsigned long bfd_mach;
+ regstacktype *regstack;
+ } asregs;
+ int asints[40];
+} saved_state_type;
+
+/* TODO: Move into sim_cpu. */
+extern saved_state_type saved_state;
+
+#endif
diff --git a/sim/sh/sim-main.h b/sim/sh/sim-main.h
index 6008b6997129..0c005370c091 100644
--- a/sim/sh/sim-main.h
+++ b/sim/sh/sim-main.h
@@ -22,100 +22,4 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "sim-basics.h"
#include "sim-base.h"

-typedef struct
-{
- int regs[20];
-} regstacktype;
-
-typedef union
-{
-
- struct
- {
- int regs[16];
- int pc;
-
- /* System registers. For sh-dsp this also includes A0 / X0 / X1 / Y0 / Y1
- which are located in fregs. Probably should include pc too - to avoid
- alignment repercussions. */
- union {
- struct {
- int mach;
- int macl;
- int pr;
- int dummy3, dummy4;
- int fpul; /* A1 for sh-dsp - but only for movs etc. */
- int fpscr; /* dsr for sh-dsp */
-
- /* sh3e / sh-dsp */
- union fregs_u {
- float f[16];
- double d[8];
- int i[16];
- } fregs[2];
- };
- int sregs[39];
- };
-
- /* Control registers; on the SH4, ldc / stc is privileged, except when
- accessing gbr. */
- union
- {
- struct
- {
- int sr;
- int gbr;
- int vbr;
- int ssr;
- int spc;
- int mod;
- /* sh-dsp */
- int rs;
- int re;
- /* sh3 */
- int bank[8];
- int dbr; /* debug base register */
- int sgr; /* saved gr15 */
- int ldst; /* load/store flag (boolean) */
- int tbr;
- int ibcr; /* sh2a bank control register */
- int ibnr; /* sh2a bank number register */
- };
- int cregs[16];
- };
-
- unsigned char *insn_end;
-
- int ticks;
- int stalls;
- int memstalls;
- int cycles;
- int insts;
-
- int prevlock;
- int thislock;
- int exception;
-
- int end_of_registers;
-
- int msize;
-#define PROFILE_FREQ 1
-#define PROFILE_SHIFT 2
- int profile;
- unsigned short *profile_hist;
- unsigned char *memory;
- int xyram_select, xram_start, yram_start;
- unsigned char *xmem;
- unsigned char *ymem;
- unsigned char *xmem_offset;
- unsigned char *ymem_offset;
- unsigned long bfd_mach;
- regstacktype *regstack;
- } asregs;
- int asints[40];
-} saved_state_type;
-
-/* TODO: Move into sim_cpu. */
-extern saved_state_type saved_state;
-
#endif
--
2.39.0