[PATCH 15/20] sim: h8300: move arch-specific settings to internal header

Mike Frysinger via Gdb-patches
2022-12-23T06:09:21Z

with common/ sim code, so move it all out to a new header which only
this port will include.
---
sim/h8300/compile.c | 2 +
sim/h8300/h8300-sim.h | 153 ++++++++++++++++++++++++++++++++++++++++++
sim/h8300/sim-main.h | 147 ----------------------------------------
3 files changed, 155 insertions(+), 147 deletions(-)
create mode 100644 sim/h8300/h8300-sim.h

diff --git a/sim/h8300/compile.c b/sim/h8300/compile.c
index 077bc6dff097..cc8b52c5d654 100644
--- a/sim/h8300/compile.c
+++ b/sim/h8300/compile.c
@@ -36,6 +36,8 @@
#include "sim-signal.h"
#include "sim/callback.h"

+#include "h8300-sim.h"
+
#ifndef SIGTRAP
# define SIGTRAP 5
#endif
diff --git a/sim/h8300/h8300-sim.h b/sim/h8300/h8300-sim.h
new file mode 100644
index 000000000000..a6bea633d242
--- /dev/null
+++ b/sim/h8300/h8300-sim.h
@@ -0,0 +1,153 @@
+/* Main header for the Hitachi h8/300 architecture. */
+
+#ifndef H8300_SIM_H
+#define H8300_SIM_H
+
+#define DEBUG
+
+/* These define the size of main memory for the simulator.
+
+ Note the size of main memory for the H8/300H is only 256k. Keeping it
+ small makes the simulator run much faster and consume less memory.
+
+ The linker knows about the limited size of the simulator's main memory
+ on the H8/300H (via the h8300h.sc linker script). So if you change
+ H8300H_MSIZE, be sure to fix the linker script too.
+
+ Also note that there's a separate "eightbit" area aside from main
+ memory. For simplicity, the simulator assumes any data memory reference
+ outside of main memory refers to the eightbit area (in theory, this
+ can only happen when simulating H8/300H programs). We make no attempt
+ to catch overlapping addresses, wrapped addresses, etc etc. */
+
+#define H8300_MSIZE (1 << 16)
+
+/* avolkov:
+ Next 2 macros are ugly for any workstation, but while they're work.
+ Memory size MUST be configurable. */
+#define H8300H_MSIZE (1 << 24)
+#define H8300S_MSIZE (1 << 24)
+
+#define CSIZE 1024
+
+enum h8_regnum {
+ R0_REGNUM = 0,
+ R1_REGNUM = 1,
+ R2_REGNUM = 2,
+ R3_REGNUM = 3,
+ R4_REGNUM = 4,
+ R5_REGNUM = 5,
+ R6_REGNUM = 6,
+ R7_REGNUM = 7,
+
+ SP_REGNUM = R7_REGNUM, /* Contains address of top of stack */
+ FP_REGNUM = R6_REGNUM, /* Contains address of executing
+ stack frame */
+ CCR_REGNUM = 8, /* Contains processor status */
+ PC_REGNUM = 9, /* Contains program counter */
+ CYCLE_REGNUM = 10,
+ EXR_REGNUM = 11,
+ INST_REGNUM = 12,
+ TICK_REGNUM = 13,
+ MACH_REGNUM = 14,
+ MACL_REGNUM = 15,
+ SBR_REGNUM = 16,
+ VBR_REGNUM = 17,
+
+ ZERO_REGNUM = 18
+};
+
+enum h8_typecodes {
+ OP_NULL,
+ OP_REG, /* Register direct. */
+ OP_LOWREG, /* Special reg syntax for "bra". */
+ OP_DISP, /* Register indirect w/displacement. */
+ /* Note: h8300, h8300h, and h8300s permit only pre-decr and post-incr. */
+ OP_PREDEC, /* Register indirect w/pre-decrement. */
+ OP_POSTDEC, /* Register indirect w/post-decrement. */
+ OP_PREINC, /* Register indirect w/pre-increment. */
+ OP_POSTINC, /* Register indirect w/post-increment. */
+ OP_PCREL, /* PC Relative. */
+ OP_MEM, /* Absolute memory address. */
+ OP_CCR, /* Condition Code Register. */
+ OP_IMM, /* Immediate value. */
+ /*OP_ABS*/ /* Un-used (duplicates op_mem?). */
+ OP_EXR, /* EXtended control Register. */
+ OP_SBR, /* Vector Base Register. */
+ OP_VBR, /* Short-address Base Register. */
+ OP_MACH, /* Multiply Accumulator - high. */
+ OP_MACL, /* Multiply Accumulator - low. */
+ /* FIXME: memory indirect? */
+ OP_INDEXB, /* Byte index mode */
+ OP_INDEXW, /* Word index mode */
+ OP_INDEXL, /* Long index mode */
+ OP_REG_DEC, /* Register direct. affect address decrement. */
+ OP_REG_INC, /* Register direct. affect address increment. */
+};
+
+/* Structure used to describe addressing */
+
+typedef struct
+{
+ int type;
+ int reg;
+ int literal;
+} ea_type;
+
+/* Struct for instruction decoder. */
+typedef struct
+{
+ ea_type src;
+ ea_type dst;
+ ea_type op3;
+ int opcode;
+ int next_pc;
+ int oldpc;
+ int cycles;
+#ifdef DEBUG
+ struct h8_opcode *op;
+#endif
+} decoded_inst;
+
+struct h8300_sim_cpu {
+ unsigned int regs[20]; /* 8 GR's plus ZERO, SBR, and VBR. */
+ unsigned int pc;
+
+ int macS; /* MAC Saturating mode */
+ int macV; /* MAC Overflow */
+ int macN; /* MAC Negative */
+ int macZ; /* MAC Zero */
+
+ int delayed_branch;
+ char **command_line; /* Pointer to command line arguments. */
+
+ unsigned char *memory;
+ int mask;
+};
+#define H8300_SIM_CPU(sd) ((struct h8300_sim_cpu *) CPU_ARCH_DATA (sd))
+
+struct h8300_sim_state {
+ unsigned long memory_size;
+#ifdef ADEBUG
+ int stats[O_LAST];
+#endif
+};
+#define H8300_SIM_STATE(sd) ((struct h8300_sim_state *) STATE_ARCH_DATA (sd))
+
+/* The current state of the processor; registers, memory, etc. */
+
+#define cpu_set_pc(cpu, val) (H8300_SIM_CPU (cpu)->pc = (val))
+#define cpu_get_pc(cpu) (H8300_SIM_CPU (cpu)->pc)
+
+/* Magic numbers used to distinguish an exit from a breakpoint. */
+#define LIBC_EXIT_MAGIC1 0xdead
+#define LIBC_EXIT_MAGIC2 0xbeef
+/* Local version of macros for decoding exit status.
+ (included here rather than try to find target version of wait.h)
+*/
+#define SIM_WIFEXITED(V) (((V) & 0xff) == 0)
+#define SIM_WIFSTOPPED(V) (!SIM_WIFEXITED (V))
+#define SIM_WEXITSTATUS(V) (((V) >> 8) & 0xff)
+#define SIM_WSTOPSIG(V) ((V) & 0x7f)
+
+#endif /* H8300_SIM_H */
diff --git a/sim/h8300/sim-main.h b/sim/h8300/sim-main.h
index c034699e5c55..003e19ce512f 100644
--- a/sim/h8300/sim-main.h
+++ b/sim/h8300/sim-main.h
@@ -3,154 +3,7 @@
#ifndef SIM_MAIN_H
#define SIM_MAIN_H

-#define DEBUG
-
-/* These define the size of main memory for the simulator.
-
- Note the size of main memory for the H8/300H is only 256k. Keeping it
- small makes the simulator run much faster and consume less memory.
-
- The linker knows about the limited size of the simulator's main memory
- on the H8/300H (via the h8300h.sc linker script). So if you change
- H8300H_MSIZE, be sure to fix the linker script too.
-
- Also note that there's a separate "eightbit" area aside from main
- memory. For simplicity, the simulator assumes any data memory reference
- outside of main memory refers to the eightbit area (in theory, this
- can only happen when simulating H8/300H programs). We make no attempt
- to catch overlapping addresses, wrapped addresses, etc etc. */
-
-#define H8300_MSIZE (1 << 16)
-
-/* avolkov:
- Next 2 macros are ugly for any workstation, but while they're work.
- Memory size MUST be configurable. */
-#define H8300H_MSIZE (1 << 24)
-#define H8300S_MSIZE (1 << 24)
-
-#define CSIZE 1024
-
-enum h8_regnum {
- R0_REGNUM = 0,
- R1_REGNUM = 1,
- R2_REGNUM = 2,
- R3_REGNUM = 3,
- R4_REGNUM = 4,
- R5_REGNUM = 5,
- R6_REGNUM = 6,
- R7_REGNUM = 7,
-
- SP_REGNUM = R7_REGNUM, /* Contains address of top of stack */
- FP_REGNUM = R6_REGNUM, /* Contains address of executing
- stack frame */
- CCR_REGNUM = 8, /* Contains processor status */
- PC_REGNUM = 9, /* Contains program counter */
- CYCLE_REGNUM = 10,
- EXR_REGNUM = 11,
- INST_REGNUM = 12,
- TICK_REGNUM = 13,
- MACH_REGNUM = 14,
- MACL_REGNUM = 15,
- SBR_REGNUM = 16,
- VBR_REGNUM = 17,
-
- ZERO_REGNUM = 18
-};
-
-enum h8_typecodes {
- OP_NULL,
- OP_REG, /* Register direct. */
- OP_LOWREG, /* Special reg syntax for "bra". */
- OP_DISP, /* Register indirect w/displacement. */
- /* Note: h8300, h8300h, and h8300s permit only pre-decr and post-incr. */
- OP_PREDEC, /* Register indirect w/pre-decrement. */
- OP_POSTDEC, /* Register indirect w/post-decrement. */
- OP_PREINC, /* Register indirect w/pre-increment. */
- OP_POSTINC, /* Register indirect w/post-increment. */
- OP_PCREL, /* PC Relative. */
- OP_MEM, /* Absolute memory address. */
- OP_CCR, /* Condition Code Register. */
- OP_IMM, /* Immediate value. */
- /*OP_ABS*/ /* Un-used (duplicates op_mem?). */
- OP_EXR, /* EXtended control Register. */
- OP_SBR, /* Vector Base Register. */
- OP_VBR, /* Short-address Base Register. */
- OP_MACH, /* Multiply Accumulator - high. */
- OP_MACL, /* Multiply Accumulator - low. */
- /* FIXME: memory indirect? */
- OP_INDEXB, /* Byte index mode */
- OP_INDEXW, /* Word index mode */
- OP_INDEXL, /* Long index mode */
- OP_REG_DEC, /* Register direct. affect address decrement. */
- OP_REG_INC, /* Register direct. affect address increment. */
-};
-
#include "sim-basics.h"
#include "sim-base.h"

-/* Structure used to describe addressing */
-
-typedef struct
-{
- int type;
- int reg;
- int literal;
-} ea_type;
-
-/* Struct for instruction decoder. */
-typedef struct
-{
- ea_type src;
- ea_type dst;
- ea_type op3;
- int opcode;
- int next_pc;
- int oldpc;
- int cycles;
-#ifdef DEBUG
- struct h8_opcode *op;
-#endif
-} decoded_inst;
-
-struct h8300_sim_cpu {
- unsigned int regs[20]; /* 8 GR's plus ZERO, SBR, and VBR. */
- unsigned int pc;
-
- int macS; /* MAC Saturating mode */
- int macV; /* MAC Overflow */
- int macN; /* MAC Negative */
- int macZ; /* MAC Zero */
-
- int delayed_branch;
- char **command_line; /* Pointer to command line arguments. */
-
- unsigned char *memory;
- int mask;
-};
-#define H8300_SIM_CPU(sd) ((struct h8300_sim_cpu *) CPU_ARCH_DATA (sd))
-
-struct h8300_sim_state {
- unsigned long memory_size;
-#ifdef ADEBUG
- int stats[O_LAST];
-#endif
-};
-#define H8300_SIM_STATE(sd) ((struct h8300_sim_state *) STATE_ARCH_DATA (sd))
-
-/* The current state of the processor; registers, memory, etc. */
-
-#define cpu_set_pc(cpu, val) (H8300_SIM_CPU (cpu)->pc = (val))
-#define cpu_get_pc(cpu) (H8300_SIM_CPU (cpu)->pc)
-
-/* Magic numbers used to distinguish an exit from a breakpoint. */
-#define LIBC_EXIT_MAGIC1 0xdead
-#define LIBC_EXIT_MAGIC2 0xbeef
-/* Local version of macros for decoding exit status.
- (included here rather than try to find target version of wait.h)
-*/
-#define SIM_WIFEXITED(V) (((V) & 0xff) == 0)
-#define SIM_WIFSTOPPED(V) (!SIM_WIFEXITED (V))
-#define SIM_WEXITSTATUS(V) (((V) >> 8) & 0xff)
-#define SIM_WSTOPSIG(V) ((V) & 0x7f)
-
#endif /* SIM_MAIN_H */
--
2.39.0