From: Thiago Jung Bauermann via Gdb-patches <gdb-patches@sourceware.org>
To: gdb-patches@sourceware.org
Subject: [PATCH 1/2] gdb/aarch64: Fix thread's gdbarch when SVE vector length changes
Date: Thu, 28 Jul 2022 01:23:05 +0000 [thread overview]
Message-ID: <20220728012306.157639-2-thiago.bauermann@linaro.org> (raw)
In-Reply-To: <20220728012306.157639-1-thiago.bauermann@linaro.org>
When the inferior program changes the SVE length, GDB can stop tracking
some registers as it obtains the new gdbarch that corresponds to the
updated length:
Breakpoint 1, do_sve_ioctl_test () at sve-ioctls.c:44
44 res = prctl(PR_SVE_SET_VL, i, 0, 0, 0, 0);
(gdb) print i
$2 = 32
(gdb) info registers
⋮
[ snip registers x0 to x30 ]
⋮
sp 0xffffffffeff0 0xffffffffeff0
pc 0xaaaaaaaaa8ac 0xaaaaaaaaa8ac <do_sve_ioctl_test+112>
cpsr 0x60000000 [ EL=0 BTYPE=0 C Z ]
fpsr 0x0 0
fpcr 0x0 0
vg 0x8 8
tpidr 0xfffff7fcb320 0xfffff7fcb320
(gdb) next
45 if (res < 0) {
(gdb) info registers
⋮
[ snip registers x0 to x30 ]
⋮
sp 0xffffffffeff0 0xffffffffeff0
pc 0xaaaaaaaaa8cc 0xaaaaaaaaa8cc <do_sve_ioctl_test+144>
cpsr 0x200000 [ EL=0 BTYPE=0 SS ]
fpsr 0x0 0
fpcr 0x0 0
vg 0x4 4
(gdb)
Notice that register tpidr disappeared when vg (which holds the vector
length) changed from 8 to 4. The tpidr register is provided by the
org.gnu.gdb.aarch64.tls feature.
This happens because the code that searches for a new gdbarch to match the
new vector length in aarch64_linux_nat_target::thread_architecture doesn't
take into account the features present in the target description associated
with the previous gdbarch. This patch makes it do that.
---
gdb/aarch64-linux-nat.c | 11 ++++++++---
gdb/aarch64-tdep.c | 25 +++++++++++++++++++++++++
gdb/aarch64-tdep.h | 2 ++
3 files changed, 35 insertions(+), 3 deletions(-)
diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c
index a457fcd48ad8..5963e246b43f 100644
--- a/gdb/aarch64-linux-nat.c
+++ b/gdb/aarch64-linux-nat.c
@@ -900,11 +900,16 @@ aarch64_linux_nat_target::thread_architecture (ptid_t ptid)
/* We reach here if the vector length for the thread is different from its
value at process start. Lookup gdbarch via info (potentially creating a
- new one), stashing the vector length inside id. Use -1 for when SVE
- unavailable, to distinguish from an unset value of 0. */
+ new one) by using a target description that corresponds to the new vq value
+ and the current architecture features. */
+
+ const struct target_desc *tdesc = gdbarch_target_desc (inf->gdbarch);
+ aarch64_features features = aarch64_features_from_target_desc (tdesc);
+ features.vq = vq;
+
struct gdbarch_info info;
info.bfd_arch_info = bfd_lookup_arch (bfd_arch_aarch64, bfd_mach_aarch64);
- info.id = (int *) (vq == 0 ? -1 : vq);
+ info.target_desc = aarch64_create_target_description (features);
return gdbarch_find_by_info (info);
}
diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index 8670197a8889..8b89b877f8f0 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -3352,6 +3352,31 @@ aarch64_read_description (const aarch64_features &features)
return tdesc;
}
+/* Get the AArch64 features present in the given target description. */
+
+aarch64_features
+aarch64_features_from_target_desc (const struct target_desc *tdesc)
+{
+ aarch64_features features;
+ const struct tdesc_feature *feature;
+
+ if (tdesc == nullptr)
+ return features;
+
+ feature = tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.sve");
+ if (feature != nullptr)
+ features.vq = tdesc_register_bitsize (feature, "z0") / 128;
+
+ features.pauth
+ = (tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.pauth") != nullptr);
+ features.mte
+ = (tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.mte") != nullptr);
+ features.tls
+ = (tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.tls") != nullptr);
+
+ return features;
+}
+
/* Return the VQ used when creating the target description TDESC. */
static uint64_t
diff --git a/gdb/aarch64-tdep.h b/gdb/aarch64-tdep.h
index 5bdd733dce32..d8513023c376 100644
--- a/gdb/aarch64-tdep.h
+++ b/gdb/aarch64-tdep.h
@@ -121,6 +121,8 @@ struct aarch64_gdbarch_tdep : gdbarch_tdep_base
};
const target_desc *aarch64_read_description (const aarch64_features &features);
+aarch64_features
+aarch64_features_from_target_desc (const struct target_desc *tdesc);
extern int aarch64_process_record (struct gdbarch *gdbarch,
struct regcache *regcache, CORE_ADDR addr);
next prev parent reply other threads:[~2022-07-28 1:24 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-28 1:23 [PATCH 0/2] Fix bug in aarch64-linux GDB when inferior changes SVE vector length Thiago Jung Bauermann via Gdb-patches
2022-07-28 1:23 ` Thiago Jung Bauermann via Gdb-patches [this message]
2022-07-28 13:03 ` [PATCH 1/2] gdb/aarch64: Fix thread's gdbarch when SVE vector length changes Luis Machado via Gdb-patches
2022-08-02 4:15 ` Thiago Jung Bauermann via Gdb-patches
2022-07-28 1:23 ` [PATCH 2/2] gdb/testsuite: Add test for AArch64 Scalable Vector Extension Thiago Jung Bauermann via Gdb-patches
2022-07-28 13:03 ` Luis Machado via Gdb-patches
2022-08-02 22:59 ` Thiago Jung Bauermann via Gdb-patches
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220728012306.157639-2-thiago.bauermann@linaro.org \
--to=gdb-patches@sourceware.org \
--cc=thiago.bauermann@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox