From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id VHpjIKCRDGJvJQAAWB0awg (envelope-from ) for ; Wed, 16 Feb 2022 00:54:40 -0500 Received: by simark.ca (Postfix, from userid 112) id 69BCF1F3C9; Wed, 16 Feb 2022 00:54:40 -0500 (EST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on simark.ca X-Spam-Level: X-Spam-Status: No, score=-3.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id 01A9C1EA69 for ; Wed, 16 Feb 2022 00:54:39 -0500 (EST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 698223858016 for ; Wed, 16 Feb 2022 05:54:39 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 698223858016 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1644990879; bh=jbQDA9fX9jK7qHSZtvRV6h2oQ3+ZIPWen4ESWrRdfUI=; h=To:In-Reply-To:Subject:References:Date:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=xM7fSMLtu1a57KH91mCH2RhPYDAdcMXIwlnYqmb7k5+5tMkOZJsVUBQUsrhOFVt9R JZS3MZvn6ceo63VxjY4zWbyQZcezyycDaZJM91PTVxXX7XlW2s9eMELZKWw8bDSgQV aDcNZyO07mFb6n/znaZyd3BK63sH0Qvfeqw+7/nE= Received: from smtp2.axis.com (smtp2.axis.com [195.60.68.18]) by sourceware.org (Postfix) with ESMTPS id F278B3858D3C for ; Wed, 16 Feb 2022 05:54:20 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org F278B3858D3C To: Mike Frysinger In-Reply-To: (message from Mike Frysinger on Tue, 15 Feb 2022 23:51:16 -0500) Subject: Re: [PATCH 08/12] sim cris: Unbreak --disable-sim-hardware builds MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 8BIT References: <20220214225824.AC90A20439@pchp3.se.axis.com> <20220214230512.7B80720439@pchp3.se.axis.com> Message-ID: <20220216055419.AC9A020411@pchp3.se.axis.com> Date: Wed, 16 Feb 2022 06:54:19 +0100 X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Hans-Peter Nilsson via Gdb-patches Reply-To: Hans-Peter Nilsson Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+public-inbox=simark.ca@sourceware.org Sender: "Gdb-patches" > Date: Tue, 15 Feb 2022 23:51:16 -0500 > From: Mike Frysinger > On 15 Feb 2022 00:05, Hans-Peter Nilsson via Gdb-patches wrote: > > +#if WITH_HW > > if (cris_have_900000xxif) > > sim_hw_parse (sd, "/core/%s/reg %#x %i", "cris_900000xx", 0x90000000, 0x100); > > +#else > > + /* With the option disabled, nothing should be able to set this variable. > > + We should "use" it, though, and why not assert that it isn't set. */ > > + ASSERT (! cris_have_900000xxif); > > +#endif > > WITH_HW is always defined to either 1 or 0. could you write: > if (WITH_HW) > ... > else > ... > > this avoids bit rot in the uncommon configure paths I don't think that's a good idea, because then we'd rely on the sim_hw_parse reference go away at *all* optimization levels. brgds, H-P