From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id mFxAJVZlXGEvHQAAWB0awg (envelope-from ) for ; Tue, 05 Oct 2021 10:46:46 -0400 Received: by simark.ca (Postfix, from userid 112) id 95AB81EE1B; Tue, 5 Oct 2021 10:46:46 -0400 (EDT) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on simark.ca X-Spam-Level: X-Spam-Status: No, score=-1.1 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,MAILING_LIST_MULTI,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id E4D5F1EDDB for ; Tue, 5 Oct 2021 10:46:45 -0400 (EDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 9AEA1385AC31 for ; Tue, 5 Oct 2021 14:46:45 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9AEA1385AC31 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1633445205; bh=2+16T5oRZW/CP6I32UoWv9Q97F9hY4BTTTYaMWVd4FM=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=sT9QeIXp+Rca5GuJe9m9N0zJdKhDc30gX2NDG37Hz5TbKjkVzsBCMIwDLUZKFCZZz b/O7spItYdCBPMjtry7RbSiHhp2Dp0KgO61B7nhHNuI04a9JLtCkQh+mr5TEQe+7Xj kXSg89tursCEWN7Nn6NR59j7K3OdaFwt0N+CyZYk= Received: from mail-qk1-x72c.google.com (mail-qk1-x72c.google.com [IPv6:2607:f8b0:4864:20::72c]) by sourceware.org (Postfix) with ESMTPS id 42878385AC1F for ; Tue, 5 Oct 2021 14:45:37 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 42878385AC1F Received: by mail-qk1-x72c.google.com with SMTP id p4so19995542qki.3 for ; Tue, 05 Oct 2021 07:45:37 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2+16T5oRZW/CP6I32UoWv9Q97F9hY4BTTTYaMWVd4FM=; b=iIEAoQWFklP/JsjfS55JkMP8g1nPaEBi62Ew6RzicQ5M6X9ZCa9x3b6sSGW2YIbQ5U 74N83nRsO8nbdntHk2HzdC68Mj/EaNRUHPpbPOLp8Xl64NDNZ4H7OrJzYWKq4aa8pMWf 5tnmcu2HqO9sNqG+qloFhX4lPm7xsALgomsJnVgZNvgVmZzZOeLGyxCj7ICg7i/W7mHf faU8FFRZwjLoUCWFNWj9PDyCDpy+Mjmkn5Rk2rKvATqqzPGrhh/7mJBAxPVKaBLiQjsH 3eKWcH1SioHsSVyYJUIbC3nF8i0Wvs+2hKUpz+XM5bemnMjPvuvr5Ux9ZqSRlTG1C5Wy IXEQ== X-Gm-Message-State: AOAM5335OJilrDjCdrKwlYP0r8Nij3WNdHZ8SqgznZxtMmG8JXLmsJmZ gs1tr7bm2qvZ4CiGvS/Fuz0PC2m8COephA== X-Google-Smtp-Source: ABdhPJyqivRJiYue8W93D/xQd6PuXQwHSD1BhQDWpTx0tYa2o1KSJgxmeoRk25SabVchDi3thKrg8Q== X-Received: by 2002:a37:f71a:: with SMTP id q26mr15112394qkj.3.1633445136633; Tue, 05 Oct 2021 07:45:36 -0700 (PDT) Received: from localhost.localdomain ([2804:7f0:4841:3c03:70c5:60d0:496d:7761]) by smtp.gmail.com with ESMTPSA id j7sm9445119qkl.125.2021.10.05.07.45.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Oct 2021 07:45:36 -0700 (PDT) To: gdb-patches@sourceware.org Subject: [PATCH 2/4] [ARM] Small refactoring of arm gdbarch initialization Date: Tue, 5 Oct 2021 11:45:19 -0300 Message-Id: <20211005144521.1965198-3-luis.machado@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211005144521.1965198-1-luis.machado@linaro.org> References: <20211005144521.1965198-1-luis.machado@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Luis Machado via Gdb-patches Reply-To: Luis Machado Cc: peter.maydell@linaro.org Errors-To: gdb-patches-bounces+public-inbox=simark.ca@sourceware.org Sender: "Gdb-patches" This is in preparation to MVE support, where we will define another pseudo register. We need to define the pseudo register numbers *after* accounting for all the registers in the XML description, so move the call to tdesc_use_registers up. If we don't do it, GDB's register count won't consider registers contained in the XML but ignored by GDB, throwing the register numbering off. --- gdb/arm-tdep.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index ab6999ae209..2a6bfb1b3f7 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -9470,6 +9470,17 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double); } + if (tdesc_data != nullptr) + { + set_tdesc_pseudo_register_name (gdbarch, arm_register_name); + + tdesc_use_registers (gdbarch, tdesc, std::move (tdesc_data)); + + /* Override tdesc_register_type to adjust the types of VFP + registers for NEON. */ + set_gdbarch_register_type (gdbarch, arm_register_type); + } + if (have_vfp_pseudos) { /* NOTE: These are the only pseudo registers used by @@ -9484,17 +9495,6 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_gdbarch_pseudo_register_write (gdbarch, arm_pseudo_write); } - if (tdesc_data != nullptr) - { - set_tdesc_pseudo_register_name (gdbarch, arm_register_name); - - tdesc_use_registers (gdbarch, tdesc, std::move (tdesc_data)); - - /* Override tdesc_register_type to adjust the types of VFP - registers for NEON. */ - set_gdbarch_register_type (gdbarch, arm_register_type); - } - /* Add standard register aliases. We add aliases even for those names which are used by the current architecture - it's simpler, and does no harm, since nothing ever lists user registers. */ -- 2.25.1