From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id D3LHFE7WqWAlKQAAWB0awg (envelope-from ) for ; Sun, 23 May 2021 00:13:02 -0400 Received: by simark.ca (Postfix, from userid 112) id 464281F11C; Sun, 23 May 2021 00:13:02 -0400 (EDT) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on simark.ca X-Spam-Level: X-Spam-Status: No, score=-0.7 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,MAILING_LIST_MULTI,RDNS_DYNAMIC,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id AA66C1E54D for ; Sun, 23 May 2021 00:13:00 -0400 (EDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id EF052386EC55; Sun, 23 May 2021 04:12:59 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org EF052386EC55 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1621743180; bh=nn+hpk2FOx6the6joPH/M2sTS77rZKXobnc4Zgi5Jcc=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=bANk+kKD3iQgQN0lHobfCit9bVyUrAwMwJWooC3BXr0+Wa7QyTI6OoHn5uStZAY8B 4+80oeTl5CB028aRAmE3Uynxi6sDIXeAWbR4ZSqNW9XtR6ns2t/hrxvBNYmM7CWJ/V jzzsm+zlPxyHWo0+CFya28ROnYC6LSz9o43PMN+g= Received: from smtp.gentoo.org (mail.gentoo.org [IPv6:2001:470:ea4a:1:5054:ff:fec7:86e4]) by sourceware.org (Postfix) with ESMTP id 360963847804; Sun, 23 May 2021 04:12:56 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 360963847804 Received: from vapier.lan (localhost [127.0.0.1]) by smtp.gentoo.org (Postfix) with ESMTP id 3D8BF34096C; Sun, 23 May 2021 04:12:55 +0000 (UTC) To: binutils@sourceware.org, Hans-Peter Nilsson Subject: [PATCH v2] opcodes: cris: move desc & opc files from sim/ Date: Sun, 23 May 2021 00:12:51 -0400 Message-Id: <20210523041251.28720-1-vapier@gentoo.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Mike Frysinger via Gdb-patches Reply-To: Mike Frysinger Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces@sourceware.org Sender: "Gdb-patches" All other cgen ports keep their desc & opc files under opcodes/, so move the cris files over too. The cris-opc.c file is already here. --- opcodes/Makefile.am | 16 ++++++++++++++- opcodes/Makefile.in | 17 +++++++++++++++- opcodes/cgen.sh | 34 +++++++++++++++++++++++++++++++ {sim/cris => opcodes}/cris-desc.c | 0 {sim/cris => opcodes}/cris-desc.h | 0 {sim/cris => opcodes}/cris-opc.h | 0 sim/cris/Makefile.in | 16 ++++----------- 7 files changed, 69 insertions(+), 14 deletions(-) rename {sim/cris => opcodes}/cris-desc.c (100%) rename {sim/cris => opcodes}/cris-desc.h (100%) rename {sim/cris => opcodes}/cris-opc.h (100%) diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am index 04980f36b113..30d86f012999 100644 --- a/opcodes/Makefile.am +++ b/opcodes/Makefile.am @@ -60,6 +60,7 @@ BUILD_LIB_DEPS = @BUILD_LIB_DEPS@ HFILES = \ aarch64-asm.h aarch64-dis.h aarch64-opc.h aarch64-tbl.h \ bpf-desc.h bpf-opc.h \ + cris-desc.h cris-opc.h \ epiphany-desc.h epiphany-opc.h \ fr30-desc.h fr30-opc.h \ frv-desc.h frv-opc.h \ @@ -108,6 +109,7 @@ TARGET_LIBOPCODES_CFILES = \ cgen-opc.c \ cr16-dis.c \ cr16-opc.c \ + cris-desc.c \ cris-dis.c \ cris-opc.c \ crx-dis.c \ @@ -371,10 +373,11 @@ CGENDEPS = \ $(CGENDIR)/opc-opinst.scm \ cgen-asm.in cgen-dis.in cgen-ibld.in -CGEN_CPUS = epiphany fr30 frv ip2k iq2000 lm32 m32c m32r mep mt or1k xc16x xstormy16 +CGEN_CPUS = cris epiphany fr30 frv ip2k iq2000 lm32 m32c m32r mep mt or1k xc16x xstormy16 if CGEN_MAINT BPF_DEPS = stamp-bpf +CRIS_DEPS = stamp-cris EPIPHANY_DEPS = stamp-epiphany FR30_DEPS = stamp-fr30 FRV_DEPS = stamp-frv @@ -390,6 +393,7 @@ XC16X_DEPS = stamp-xc16x XSTORMY16_DEPS = stamp-xstormy16 else BPF_DEPS = +CRIS_DEPS = EPIPHANY_DEPS = FR30_DEPS = FRV_DEPS = @@ -431,6 +435,16 @@ stamp-bpf: $(CGENDEPS) $(CPUDIR)/bpf.cpu $(CPUDIR)/bpf.opc $(MAKE) run-cgen arch=bpf prefix=bpf \ archfile=$(CPUDIR)/bpf.cpu opcfile=$(CPUDIR)/bpf.opc +$(srcdir)/cris-desc.h $(srcdir)/cris-desc.c $(srcdir)/cris-opc.h \ + $(srcdir)/cris-opc.c $(srcdir)/cris-dis.c: $(CRIS_DEPS) + @true + +stamp-cris: $(CGENDEPS) $(CPUDIR)/cris.cpu + $(SHELL) $(srcdir)/cgen.sh desc $(srcdir) $(CGEN) \ + $(CGENDIR) "$(CGENFLAGS)" cris cris $(CPUDIR)/cris.cpu /dev/null \ + "$(options)" "$(extrafiles)" + touch $@ + $(srcdir)/epiphany-desc.h $(srcdir)/epiphany-desc.c $(srcdir)/epiphany-opc.h \ $(srcdir)/epiphany-opc.c $(srcdir)/epiphany-ibld.c \ $(srcdir)/epiphany-opinst.c $(srcdir)/epiphany-asm.c \ diff --git a/opcodes/cgen.sh b/opcodes/cgen.sh index bdcc56df687c..cf6a5f112a66 100644 --- a/opcodes/cgen.sh +++ b/opcodes/cgen.sh @@ -175,6 +175,40 @@ opcodes) rm -f ${tmp}-asm.in1 ${tmp}-dis.in1 ;; +desc) + # For ports that only generate the desc module & opc header. + rm -f ${tmp}-desc.h1 ${tmp}-desc.h + rm -f ${tmp}-desc.c1 ${tmp}-desc.c + rm -f ${tmp}-opc.h1 ${tmp}-opc.h + + ${cgen} ${cgendir}/cgen-opc.scm \ + -s ${cgendir} \ + ${cgenflags} \ + -OPC ${opcfile} \ + -f "${archflags}" \ + -m all \ + -a ${archfile} \ + -i all \ + -H ${tmp}-desc.h1 \ + -C ${tmp}-desc.c1 \ + -O ${tmp}-opc.h1 + + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \ + -e "s/@prefix@/${prefix}/g" \ + < ${tmp}-desc.h1 > ${tmp}-desc.h + ${rootdir}/move-if-change ${tmp}-desc.h ${srcdir}/${arch}-desc.h + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \ + -e "s/@prefix@/${prefix}/g" \ + < ${tmp}-desc.c1 > ${tmp}-desc.c + ${rootdir}/move-if-change ${tmp}-desc.c ${srcdir}/${arch}-desc.c + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \ + -e "s/@prefix@/${prefix}/g" \ + < ${tmp}-opc.h1 > ${tmp}-opc.h + ${rootdir}/move-if-change ${tmp}-opc.h ${srcdir}/${arch}-opc.h + + rm -f ${tmp}-desc.h1 ${tmp}-desc.c1 ${tmp}-opc.h1 + ;; + *) echo "$0: bad action: ${action}" >&2 exit 1 diff --git a/sim/cris/cris-desc.c b/opcodes/cris-desc.c similarity index 100% rename from sim/cris/cris-desc.c rename to opcodes/cris-desc.c diff --git a/sim/cris/cris-desc.h b/opcodes/cris-desc.h similarity index 100% rename from sim/cris/cris-desc.h rename to opcodes/cris-desc.h diff --git a/sim/cris/cris-opc.h b/opcodes/cris-opc.h similarity index 100% rename from sim/cris/cris-opc.h rename to opcodes/cris-opc.h diff --git a/sim/cris/Makefile.in b/sim/cris/Makefile.in index 3dcdbb2da022..d5e8a88f3a8a 100644 --- a/sim/cris/Makefile.in +++ b/sim/cris/Makefile.in @@ -29,14 +29,13 @@ SIM_OBJS = \ sim-if.o arch.o \ $(CRISV10F_OBJS) \ $(CRISV32F_OBJS) \ - traps.o \ - cris-desc.o + traps.o # Extra headers included by sim-main.h. # FIXME: $(srccom)/cgen-ops.h should be in CGEN_INCLUDE_DEPS. SIM_EXTRA_DEPS = \ $(CGEN_INCLUDE_DEPS) $(srccom)/cgen-ops.h \ - arch.h cpuall.h cris-sim.h cris-desc.h engv10.h engv32.h + arch.h cpuall.h cris-sim.h engv10.h engv32.h SIM_EXTRA_CLEAN = cris-clean @@ -97,7 +96,7 @@ cris-clean: rm -f mloopv$${v}f.c engv$${v}.h stamp-v$${v}fmloop; \ rm -f stamp-v$${v}fcpu; \ done - -rm -f stamp-arch stamp-desc + -rm -f stamp-arch -rm -f tmp-* # cgen support, enable with --enable-cgen-maint @@ -106,7 +105,7 @@ CGEN_MAINT = ; @true @CGEN_MAINT@CGEN_MAINT = # Useful when making CGEN-generated files manually, without --enable-cgen-maint. -stamps: stamp-v10fmloop stamp-v32fmloop stamp-arch stamp-v10fcpu stamp-v32fcpu stamp-desc +stamps: stamp-v10fmloop stamp-v32fmloop stamp-arch stamp-v10fcpu stamp-v32fcpu stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/cris.cpu Makefile $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=crisv10,crisv32 \ @@ -135,10 +134,3 @@ stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cr mv decodev32.c.tmp $(srcdir)/decodev32.c touch stamp-v32fcpu cpuv32.h cpuv32.c semcrisv32f-switch.c modelv32.c decodev32.c decodev32.h: $(CGEN_MAINT) stamp-v32fcpu - -stamp-desc: $(CGEN_READ_SCM) $(CGEN_DESC_SCM) $(CPU_DIR)/cris.cpu Makefile - $(MAKE) cgen-desc $(CGEN_FLAGS_TO_PASS) \ - archfile=$(CPU_DIR)/cris.cpu \ - cpu=cris mach=all - touch stamp-desc -cris-desc.c cris-desc.h cris-opc.h: $(CGEN_MAINT) stamp-desc -- 2.31.1