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Date: Sat, 17 Apr 2021 10:58:26 -0700 Message-Id: <20210417175831.16413-20-jimw@sifive.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210417175831.16413-1-jimw@sifive.com> References: <20210417175831.16413-1-jimw@sifive.com> X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kito Cheng Errors-To: gdb-patches-bounces@sourceware.org Sender: "Gdb-patches" From: Kito Cheng Print args for slt* instructions, and reformat a few lines to improve style. sim/riscv/ * sim-main.c (execute_i): In case MATCH_sraiw, fix formatting. In cases MATCH_SLT, MATCH_SLTU, MATCBH_SLTI, MATCH_SLTIU, add instruction args to TRACE_INSN, and fix formatting. --- sim/riscv/sim-main.c | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c index 13adfa9..ac0e910 100644 --- a/sim/riscv/sim-main.c +++ b/sim/riscv/sim-main.c @@ -1455,28 +1455,29 @@ execute_i (SIM_CPU *cpu, unsigned_word iw, const struct riscv_opcode *op) TRACE_INSN (cpu, "sraiw %s, %s, %" PRIiTW "; // %s = %s >>> %#" PRIxTW, rd_name, rs1_name, shamt_imm, rd_name, rs1_name, shamt_imm); RISCV_ASSERT_RV64 (cpu, "insn: %s", op->name); - store_rd (cpu, rd, EXTEND32 ( - ashiftrt ((signed32) cpu->regs[rs1], shamt_imm))); + store_rd (cpu, rd, + EXTEND32 (ashiftrt ((signed32) cpu->regs[rs1], shamt_imm))); break; case MATCH_SLT: - TRACE_INSN (cpu, "slt"); + TRACE_INSN (cpu, "slt %s, %s, %s", rd_name, rs1_name, rs2_name); store_rd (cpu, rd, !!((signed_word) cpu->regs[rs1] < (signed_word) cpu->regs[rs2])); break; case MATCH_SLTU: - TRACE_INSN (cpu, "sltu"); - store_rd (cpu, rd, !!((unsigned_word) cpu->regs[rs1] < - (unsigned_word) cpu->regs[rs2])); + TRACE_INSN (cpu, "sltu %s, %s, %s", rd_name, rs1_name, rs2_name); + store_rd (cpu, rd, + !!((unsigned_word) cpu->regs[rs1] + < (unsigned_word) cpu->regs[rs2])); break; case MATCH_SLTI: - TRACE_INSN (cpu, "slti"); - store_rd (cpu, rd, !!((signed_word) cpu->regs[rs1] < - (signed_word) i_imm)); + TRACE_INSN (cpu, "slti %s, %s, %" PRIiTW, rd_name, rs1_name, i_imm); + store_rd (cpu, rd, + !!((signed_word) cpu->regs[rs1] < (signed_word) i_imm)); break; case MATCH_SLTIU: - TRACE_INSN (cpu, "sltiu"); - store_rd (cpu, rd, !!((unsigned_word) cpu->regs[rs1] < - (unsigned_word) i_imm)); + TRACE_INSN (cpu, "sltiu %s, %s, %" PRIiTW, rd_name, rs1_name, i_imm); + store_rd (cpu, rd, + !!((unsigned_word) cpu->regs[rs1] < (unsigned_word) i_imm)); break; case MATCH_AUIPC: TRACE_INSN (cpu, "auipc %s, %" PRIiTW "; // %s = pc + %" PRIiTW, -- 2.7.4