From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id uHhML/che2AGOwAAWB0awg (envelope-from ) for ; Sat, 17 Apr 2021 13:59:19 -0400 Received: by simark.ca (Postfix, from userid 112) id AD6BD1F106; Sat, 17 Apr 2021 13:59:19 -0400 (EDT) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on simark.ca X-Spam-Level: X-Spam-Status: No, score=-1.1 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,MAILING_LIST_MULTI,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id A4B241EE0E for ; Sat, 17 Apr 2021 13:59:17 -0400 (EDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 5743C3898521; Sat, 17 Apr 2021 17:59:17 +0000 (GMT) Received: from mail-pf1-x42e.google.com (mail-pf1-x42e.google.com [IPv6:2607:f8b0:4864:20::42e]) by sourceware.org (Postfix) with ESMTPS id 33EA3389850A for ; Sat, 17 Apr 2021 17:59:10 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 33EA3389850A Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=sifive.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=jimw@sifive.com Received: by mail-pf1-x42e.google.com with SMTP id c3so1646727pfo.3 for ; Sat, 17 Apr 2021 10:59:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=DxAUWN8EWRIP70N3KtvNX8LfeQnoFeYwTk1j5nXV1Dg=; b=TA/cJwnUuoHZpA9Cj1ctF5Dvrq285JaTTBbSYPEgWpfMgJrCYgHX+X0PbYVVK1P9iz 9IyCIbeVVS7YBz+xYf1mjbEJNaeMDgf0B/qOlVKBh/Dd/qOk9lzNhpjfoqVmHsKEBsDT tkKjRTllp7JD+p4Rrnf38bAjKGpUlf6w4Yb3/xCEmpUXOP0WxhWsK9vE/BmDPHtqT/GN lpTjE/rOpaoeYpWojjXs1spLWDi1GtLoGlyBllx2hAjcLq4TzB8HAPdnbblSekYcRfuv e+WyWXuf7BOwWqgGHlZR7v0KF7Y7Noa1sp/2w4IsdTvBv+eboJXz+UoWwV8udkb5BUAH vrrA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=DxAUWN8EWRIP70N3KtvNX8LfeQnoFeYwTk1j5nXV1Dg=; b=sk8u+dHrvq3H8s2wuI1C/J7h65i49xA6g1VdMd7HXTxbrkijobS1sKCV7CQ/e1aTRZ 5RH9TANL6ZWxb0FriyjVwklYVxof0UIPahs4PSAKQq6cOH2Nf4bmDT0pL+bp75DmKfeD vfZtwOBN6y4fB19OeeQUp2Y5Vv8w8GlLDNDOs63vfH/KzNryXiiiFdcryvg9WO1AW5cw i1GOoousm635R9Ul3BUJ+cKMBv2l2QefIP4tPGCK93AR9YyB4IC0geTBnyqiijDtAB4i vESIXneZnQB3tPtOXuASNk77gJh3xlk15kbiaiqziZDDxqGUnRHNhvdm3vthdX7pPrqy P5kA== X-Gm-Message-State: AOAM5310cui2iWD5gDJp88h4AllzVA0G79B6roHVdMHmqwkKeBK4jLT7 Bf15v5J1gBHMNH44JqMSha1i2e/SOk3v1A== X-Google-Smtp-Source: ABdhPJz0NIuJmaTweKM9tHQ/R2fJ+WjUlFQf2m+yMlpeMHzBiHsGXMgDEIdV3mcKc0iVWOEpH3JWng== X-Received: by 2002:a63:79ca:: with SMTP id u193mr2316601pgc.445.1618682349084; Sat, 17 Apr 2021 10:59:09 -0700 (PDT) Received: from rohan.hsd1.ca.comcast.net ([2601:646:c180:b150:1820:3ed4:975:3fbe]) by smtp.gmail.com with ESMTPSA id u4sm5030705pfk.56.2021.04.17.10.59.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 17 Apr 2021 10:59:08 -0700 (PDT) From: Jim Wilson To: gdb-patches@sourceware.org Subject: [PATCH 09/24] RISC-V sim: Fix syscall fallback. Date: Sat, 17 Apr 2021 10:58:16 -0700 Message-Id: <20210417175831.16413-10-jimw@sifive.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210417175831.16413-1-jimw@sifive.com> References: <20210417175831.16413-1-jimw@sifive.com> X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kito Cheng Errors-To: gdb-patches-bounces@sourceware.org Sender: "Gdb-patches" From: Kito Cheng Fall back to sim_syscall if we don't handle this syscall. sim/riscv/ * sim-main.c (execute_i): In case MATCH_ECALL, make default case call sim_syscall. --- sim/riscv/sim-main.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c index 597e9c3..48cf27f 100644 --- a/sim/riscv/sim-main.c +++ b/sim/riscv/sim-main.c @@ -1284,7 +1284,8 @@ execute_i (SIM_CPU *cpu, unsigned_word iw, const struct riscv_opcode *op) break; } default: - cpu->a0 = -1; + cpu->a0 = sim_syscall (cpu, cpu->a7, cpu->a0, + cpu->a1, cpu->a2, cpu->a3); break; } } -- 2.7.4