From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id JBobI27tF2B3BQAAWB0awg (envelope-from ) for ; Mon, 01 Feb 2021 07:00:46 -0500 Received: by simark.ca (Postfix, from userid 112) id 81AA31EF80; Mon, 1 Feb 2021 07:00:46 -0500 (EST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on simark.ca X-Spam-Level: X-Spam-Status: No, score=-1.1 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,MAILING_LIST_MULTI,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id 1A7131E590 for ; Mon, 1 Feb 2021 07:00:45 -0500 (EST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 771FB3836C23; Mon, 1 Feb 2021 12:00:44 +0000 (GMT) Received: from mail-wr1-x42a.google.com (mail-wr1-x42a.google.com [IPv6:2a00:1450:4864:20::42a]) by sourceware.org (Postfix) with ESMTPS id E0ED93836C02 for ; Mon, 1 Feb 2021 12:00:39 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org E0ED93836C02 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=embecosm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=andrew.burgess@embecosm.com Received: by mail-wr1-x42a.google.com with SMTP id z6so16218451wrq.10 for ; Mon, 01 Feb 2021 04:00:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=embecosm.com; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=k95TAna8cfp063fCkVtNTYe95SdXLpy9yunoReZlsJs=; b=fSTDjOAO0Ou0JSClMbEDEzCRBOBNVOUvW0iNVQIIc5BWb2dTaGHxkoEeoEFaZ9mOkj z94TPFtoiMWe/Eo7fXhfOAVNeNPPB6piB2Hwa4lt41BW1+T8WfYqkr2QtUDjgUxKFWEI R7jA35NCgAp+WOc/iwwGuke3Z1SlOrh8dJ+kAyFYDVjI15T8axMS8V1x3pu2WbpkJJYp 42cZ+cuF2wCr7/uLzsNNOJTUYKTOhYmeGZKtxG4jth8VKp8VjrieSkDhUfc6S9szGqsq akiZ7RmQlhG7oL6OrehcBHT+1hpsL+t/wwvvG44rjW8Al9Me1tqp/c8gbmGhxnLeDEhc ObvQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=k95TAna8cfp063fCkVtNTYe95SdXLpy9yunoReZlsJs=; b=UUpgMHRR02flg8gyz4V1LkHNeG98Z+xRihEwCZUOJp9diXx532LdRYxu9CdtYfFRxw dHb6Ed8/FUhEYVL2Uhp3mvbD7ZAyPM0Fy6++jAyzUJC9LpI5OTkwjcIhKyG56QMZSO6K wGPQw8fPvP8Dt6HeKj8VbditehWKDbeo28POInWkDN9TTRnYSr/fiPk5mAcT4bLEWIEn DFLOjhhuhsp6hIwyq15i4weByTJX8Zs1mpUc4hmoukotB/0Lg9sV/MrX592oNLsEy79U d1BfuisGc0/8vkVIAozI7zBfjdTN2h3SmOvk76ERKOphSAfutQrA8EoLSFuRNYIqJ45d WfJA== X-Gm-Message-State: AOAM532bylJYtD7Wed7rI7w4A8ts3m1hGk39nHgCZL7w1Rz77d6hp9Un HHKnBaJg30HkpNCvvW4SLGZEvAqu4y/jaA== X-Google-Smtp-Source: ABdhPJztbmoUWSdPZW5gIuDB1eLGTREg42kCAgddXUUhXzkzgIfOrupgMC6j3qsotlbBP3lc51c4EA== X-Received: by 2002:adf:df12:: with SMTP id y18mr17935165wrl.141.1612180838730; Mon, 01 Feb 2021 04:00:38 -0800 (PST) Received: from localhost (host86-191-239-31.range86-191.btcentralplus.com. [86.191.239.31]) by smtp.gmail.com with ESMTPSA id d10sm1768569wrn.88.2021.02.01.04.00.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Feb 2021 04:00:37 -0800 (PST) Date: Mon, 1 Feb 2021 12:00:36 +0000 From: Andrew Burgess To: gdb-patches@sourceware.org, binutils@sourceware.org Subject: Re: [PATCHv2 6/9] bfd/binutils: add support for RISC-V CSRs in core files Message-ID: <20210201120036.GT265215@embecosm.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Operating-System: Linux/5.8.13-100.fc31.x86_64 (x86_64) X-Uptime: 11:58:45 up 54 days, 16:43, X-Editor: GNU Emacs [ http://www.gnu.org/software/emacs ] X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fredrik Hederstierna Errors-To: gdb-patches-bounces@sourceware.org Sender: "Gdb-patches" Here is an update version of this patch. In this patch I have placed the CSRs into a note named "GDB". This should protect us if, in the future, the note type number I have used is reused by some other core file producer (Linux / FreeBSD) and given a different meaning. Any feedback? Thanks, Andrew --- commit 15bcb460981a000e74b2d3dc4f59f0f06bc0cd52 Author: Andrew Burgess Date: Fri Nov 27 14:04:16 2020 +0000 bfd/binutils: add support for RISC-V CSRs in core files Adds support for including RISC-V control and status registers into core files. The value for the define NT_RISCV_CSR is set to 0x900, this corresponds to a patch I have proposed for the Linux kernel here: http://lists.infradead.org/pipermail/linux-riscv/2020-December/003910.html As I have not yet heard if the above patch will be accepted into the kernel or not I have set the note name string to "GDB", and the note type to NT_RISCV_CSR. This means that if the above patch is rejected from the kernel, and the note type number 0x900 is assigned to some other note type, we will still be able to distinguish between the GDB produced NT_RISCV_CSR, and the kernel produced notes, where the name would be set to "CORE". bfd/ChangeLog: * elf-bfd.h (elfcore_write_riscv_csr): Declare. * elf.c (elfcore_grok_riscv_csr): New function. (elfcore_grok_note): Handle NT_RISCV_CSR. (elfcore_write_riscv_csr): New function. (elfcore_write_register_note): Handle '.reg-riscv-csr'. binutils/ChangeLog: * readelf.c (get_note_type): Handle NT_RISCV_CSR. include/ChangeLog: * elf/common.h (NT_RISCV_CSR): Define. diff --git a/bfd/elf-bfd.h b/bfd/elf-bfd.h index 779acc745bc..5b7eb8897c8 100644 --- a/bfd/elf-bfd.h +++ b/bfd/elf-bfd.h @@ -2797,6 +2797,8 @@ extern char *elfcore_write_aarch_pauth (bfd *, char *, int *, const void *, int); extern char *elfcore_write_arc_v2 (bfd *, char *, int *, const void *, int); +extern char *elfcore_write_riscv_csr + (bfd *, char *, int *, const void *, int); extern char *elfcore_write_gdb_tdesc (bfd *, char *, int *, const void *, int); extern char *elfcore_write_lwpstatus diff --git a/bfd/elf.c b/bfd/elf.c index c6cf7fe2d6e..d1fd29f380a 100644 --- a/bfd/elf.c +++ b/bfd/elf.c @@ -9912,6 +9912,12 @@ elfcore_grok_arc_v2 (bfd *abfd, Elf_Internal_Note *note) return elfcore_make_note_pseudosection (abfd, ".reg-arc-v2", note); } +static bfd_boolean +elfcore_grok_riscv_csr (bfd *abfd, Elf_Internal_Note *note) +{ + return elfcore_make_note_pseudosection (abfd, ".reg-riscv-csr", note); +} + static bfd_boolean elfcore_grok_gdb_tdesc (bfd *abfd, Elf_Internal_Note *note) { @@ -10583,6 +10589,13 @@ elfcore_grok_note (bfd *abfd, Elf_Internal_Note *note) else return TRUE; + case NT_RISCV_CSR: + if (note->namesz == 4 + && strcmp (note->namedata, "GDB") == 0) + return elfcore_grok_riscv_csr (abfd, note); + else + return TRUE; + case NT_PRPSINFO: case NT_PSINFO: if (bed->elf_backend_grok_psinfo) @@ -11964,6 +11977,18 @@ elfcore_write_arc_v2 (bfd *abfd, note_name, NT_ARC_V2, arc_v2, size); } +char * +elfcore_write_riscv_csr (bfd *abfd, + char *buf, + int *bufsiz, + const void *csrs, + int size) +{ + const char *note_name = "GDB"; + return elfcore_write_note (abfd, buf, bufsiz, + note_name, NT_RISCV_CSR, csrs, size); +} + char * elfcore_write_gdb_tdesc (bfd *abfd, char *buf, @@ -12062,6 +12087,8 @@ elfcore_write_register_note (bfd *abfd, return elfcore_write_arc_v2 (abfd, buf, bufsiz, data, size); if (strcmp (section, ".gdb-tdesc") == 0) return elfcore_write_gdb_tdesc (abfd, buf, bufsiz, data, size); + if (strcmp (section, ".reg-riscv-csr") == 0) + return elfcore_write_riscv_csr (abfd, buf, bufsiz, data, size); return NULL; } diff --git a/binutils/readelf.c b/binutils/readelf.c index feb458877c8..807eccfb026 100644 --- a/binutils/readelf.c +++ b/binutils/readelf.c @@ -18374,6 +18374,8 @@ get_note_type (Filedata * filedata, unsigned e_type) return _("NT_ARM_HW_WATCH (AArch hardware watchpoint registers)"); case NT_ARC_V2: return _("NT_ARC_V2 (ARC HS accumulator/extra registers)"); + case NT_RISCV_CSR: + return _("NT_RISCV_CSR (RISC-V control and status registers)"); case NT_PSTATUS: return _("NT_PSTATUS (pstatus structure)"); case NT_FPREGS: diff --git a/include/elf/common.h b/include/elf/common.h index e6e9c278faa..4cb3748e4fd 100644 --- a/include/elf/common.h +++ b/include/elf/common.h @@ -674,6 +674,8 @@ /* note name must be "LINUX". */ #define NT_ARC_V2 0x600 /* ARC HS accumulator/extra registers. */ /* note name must be "LINUX". */ +#define NT_RISCV_CSR 0x900 /* RISC-V Control and Status Registers */ + /* note name must be "CORE". */ #define NT_SIGINFO 0x53494749 /* Fields of siginfo_t. */ #define NT_FILE 0x46494c45 /* Description of mapped files. */