From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id oBjcJFyf7F8ACwAAWB0awg (envelope-from ) for ; Wed, 30 Dec 2020 10:40:12 -0500 Received: by simark.ca (Postfix, from userid 112) id 91DB01F0B7; Wed, 30 Dec 2020 10:40:12 -0500 (EST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on simark.ca X-Spam-Level: X-Spam-Status: No, score=0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,MAILING_LIST_MULTI,RDNS_NONE,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.2 Received: from sourceware.org (unknown [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id AEEB21F075 for ; Wed, 30 Dec 2020 10:40:11 -0500 (EST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 639D9388E819; Wed, 30 Dec 2020 15:40:11 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 639D9388E819 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1609342811; bh=kiUSQk/y/PTZUXG7h6ZnGs10+nzV7XMrymmn9jG0Fr8=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=P4AXFE44qLVvImInsjpDlGAaxc/CTQoFGAWZowCmNqdfowWDIU3Zpod0jvXBR3qq1 JTrOZYDOj6KOF/M/x3oui6byikXl6kMDhtcPvIK8jca2w3jWuRCZtVSehOz62l/q1s FjVyZk+xIPRnTe9z97zkZIa8TydAF81QEnLwiVZQ= Received: from mail-qk1-x72b.google.com (mail-qk1-x72b.google.com [IPv6:2607:f8b0:4864:20::72b]) by sourceware.org (Postfix) with ESMTPS id 2A982388C01C for ; Wed, 30 Dec 2020 15:40:07 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 2A982388C01C Received: by mail-qk1-x72b.google.com with SMTP id h4so14206485qkk.4 for ; Wed, 30 Dec 2020 07:40:07 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kiUSQk/y/PTZUXG7h6ZnGs10+nzV7XMrymmn9jG0Fr8=; b=I9DDeoHjrudLZzb4H8mIIS5Fqqjg7/wklyPCcz4jKt4dN50MO0YxNV5mGTpz6ovofi +w9604qA9l8f/CWL476/xPCHMto6TTPHpHZNgZE7UzudZMY1yd0YiGxrlCrDyfFQVZlZ YFcL4Op59ORPOvxo+IGjUrci0C8bfIHuUQuoQMXPepugj8Or9S7H+ZlWRE9Te6pSpnEh NniVCtPt1L52bH7KY+0C8E8pYNdJ1KAO5O5VAU2K/7oq8SKGq2DP4B9df15fCMHHEOQl GL9eCxOOP7ZKYAfgTNkTSgaYDupLnuj82sL8KuoElc7Rbogn6cqqCrGqw+cjQmWM7KmQ +0iQ== X-Gm-Message-State: AOAM533XqFu7v2Cajtj4trmJxu+NLsh5BV4rcqHMcPspvD8TEf22/WW+ CvW65nC+fbuX0af07/f6bKU2NUCRJdtpjw== X-Google-Smtp-Source: ABdhPJyUoyjgD/sjFYsBFoGmD3DZjLiAW5cdIFdhXwIzXVMAAAWs8lulo4mQC5etSDdiWfEZe0S3+w== X-Received: by 2002:a37:8707:: with SMTP id j7mr33563805qkd.203.1609342806519; Wed, 30 Dec 2020 07:40:06 -0800 (PST) Received: from localhost.localdomain ([2804:7f0:8284:370e:c9ba:c4ec:737b:57da]) by smtp.gmail.com with ESMTPSA id f6sm28589336qkh.2.2020.12.30.07.40.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Dec 2020 07:40:06 -0800 (PST) To: gdb-patches@sourceware.org Subject: [PATCH v4 21/25] Documentation for the new mtag commands Date: Wed, 30 Dec 2020 12:39:12 -0300 Message-Id: <20201230153916.1586725-22-luis.machado@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201230153916.1586725-1-luis.machado@linaro.org> References: <20201230153916.1586725-1-luis.machado@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Luis Machado via Gdb-patches Reply-To: Luis Machado Cc: david.spickett@linaro.org Errors-To: gdb-patches-bounces@sourceware.org Sender: "Gdb-patches" Updates on v4: - Update the command names. -- Document the new "memory-tag" command prefix and all of its subcommands. gdb/doc/ChangeLog: YYYY-MM-DD Luis Machado * gdb.texinfo (Memory Tagging): New subsection and node. (AArch64 Memory Tagging Extension): New subsection. --- gdb/doc/gdb.texinfo | 97 ++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 96 insertions(+), 1 deletion(-) diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index 71dd434622..d5cfc1c40c 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -10932,6 +10932,66 @@ target supports computing the CRC checksum of a block of memory (@pxref{qCRC packet}). @end table +@node Memory Tagging +@subsection Memory Tagging + +Memory tagging is a memory protection technology that uses a pair of tags to +validate memory accesses through pointers. The tags are integer values +usually comprised of a few bits, depending on the architecture. + +There are two types of tags that are used in this setup: logical and +allocation. A logical tag is stored in the pointers themselves, usually at the +higher bits of the pointers. An allocation tag is the tag associated +with particular ranges of memory in the physical address space, against which +the logical tags from pointers are compared. + +The pointer tag (logical tag) must match the memory tag (allocation tag) +for the memory access to be valid. If the logical tag does not match the +allocation tag, that will raise a memory violation. + +Allocation tags cover multiple contiguous bytes of physical memory. This +range of bytes is called a memory tag granule and is architecture-specific. +For example, AArch64 has a tag granule of 16 bytes, meaning each allocation +tag spans 16 bytes of memory. + +If the underlying architecture supports memory tagging, like AArch64 MTE +or SPARC ADI do, @value{GDBN} can make use of it to validate addresses and +pointers against memory allocation tags. + +A command prefix of @code{memory-tag} gives access to the various memory tagging +commands. + +The @code{memory-tag} commands are the following: + +@table @code +@kindex memory-tag print-logical-tag +@item memory-tag print-logical-tag @var{address_expression} +Print the logical tag stored at the address given by @var{address_expression}. +@kindex memory-tag with-logical-tag +@item memory-tag with-logical-tag @var{address_expression} @var{tag_bytes} +Print the address given by @var{address_expression}, augmented with a logical +tag of @var{tag_bytes}. +@kindex memory-tag print-allocation-tag +@item memory-tag print-allocation-tag @var{address_expression} +Print the allocation tag associated with the memory address given by +@var{address_expression}. +@kindex memory-tag setatag +@item memory-tag setatag @var{starting_address} @var{length} @var{tag_bytes} +Set the allocation tag(s) for memory range @r{[}@var{starting_address}, +@var{starting_address} + @var{length}@r{)} to @var{tag_bytes}. +@kindex memory-tag check +@item memory-tag check @var{address_expression} +Check that the logical tag stored at the address given by +@var{address_expression} matches the allocation tag for the same address. + +This essentially emulates the hardware validation that is done when tagged +memory is accessed through a pointer, but does not cause a memory fault as +it would during hardware validation. + +It can be used to inspect potential memory tagging violations in the running +process, before any faults get triggered. +@end table + @node Auto Display @section Automatic Display @cindex automatic display @@ -25050,6 +25110,41 @@ When GDB prints a backtrace, any addresses that required unmasking will be postfixed with the marker [PAC]. When using the MI, this is printed as part of the @code{addr_flags} field. +@subsubsection AArch64 Memory Tagging Extension. +@cindex AArch64 Memory Tagging Extension. + +When @value{GDBN} is debugging the AArch64 architecture, the program is +using the v8.5-A feature Memory Tagging Extension (MTE) and there is support +in the kernel for MTE, @value{GDBN} will make memory tagging functionality +available for inspection and editing of logical and allocation tags. +@xref{Memory Tagging}. + +To aid debugging, @value{GDBN} will output additional information when SIGSEGV +signals are generated as a result of memory tag failures. + +If the tag violation is synchronous, the following will be shown: + +@smallexample +Program received signal SIGSEGV, Segmentation fault +Memory tag violation while accessing address 0x0000fffff7ff8000 +Allocation tag 0x0000000000000001. +@end smallexample + +If the tag violation is asynchronous, the fault address is not available. +In this case @value{GDBN} will show the following: + +@smallexample +Program received signal SIGSEGV, Segmentation fault +Memory tag violation +Fault address unavailable. +@end smallexample + +A special register, @code{tag_ctl}, is made available through the +@code{org.gnu.gdb.aarch64.mte} feature. This register exposes some +options that can be controlled at runtime and emulates the @code{prctl} +option @code{PR_SET_TAGGED_ADDR_CTRL}. For further information, see the +documentation in the Linux kernel. + @node i386 @subsection x86 Architecture-specific Issues @@ -41005,7 +41100,7 @@ does not have any restriction on alignment or size. @var{length} is the length, in bytes, of the memory range. -@var{type} is the type of tag the request wants to fetch. The typeis a signed +@var{type} is the type of tag the request wants to fetch. The type is a signed integer. @var{tag bytes} is a sequence of hex encoded uninterpreted bytes which will be -- 2.25.1