From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id hllTJNzlql+NFAAAWB0awg (envelope-from ) for ; Tue, 10 Nov 2020 14:11:24 -0500 Received: by simark.ca (Postfix, from userid 112) id 8759A1F08B; Tue, 10 Nov 2020 14:11:24 -0500 (EST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on simark.ca X-Spam-Level: X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED, MAILING_LIST_MULTI,T_DKIM_INVALID,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id 282171E58E for ; Tue, 10 Nov 2020 14:11:21 -0500 (EST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A0C1C386F818; Tue, 10 Nov 2020 19:11:20 +0000 (GMT) Received: from server28.superhosting.bg (server28.superhosting.bg [217.174.156.11]) by sourceware.org (Postfix) with ESMTPS id 3D90F3850405 for ; Tue, 10 Nov 2020 19:11:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 3D90F3850405 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=dinux.eu Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=dimitar@dinux.eu DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=dinux.eu; s=default; h=Content-Transfer-Encoding:MIME-Version:Message-Id:Date:Subject: Cc:To:From:Sender:Reply-To:Content-Type:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: In-Reply-To:References:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=LUMG7wHMmKMt9SN2e4Bt3EF+NUhkx1vncz8xWNnLLSQ=; b=w63cyiM1vTZV1Lvv23cl0dMhbm nBOyp9bzaivxr+nXn62u1nSwWJpgL+FIL6Y8NOGKR1tex2W6Mme3bSseapnrsMzQZYvQglBnDicbh A1+d5G7j1q4KLcjBgM0GAQD2Eod3sEugHZOY6Ms370IMrvUxgxPlbeRS1FRpXdqF5jyHtN1nmfrFR /XIY135LcGFXcdtNENaTp+DQfHLh56mYIYjFjdO6d0ZnRhMz7iB3MuwWFeX+Frdd+msOeaM6GJ/dp 5RrDrW9Oz/OKRxq054ZXEmiTcvreSSIQC4L4g/8Tok1zhMN0vtep2E7iX/wwA7VC/Y9bTpRRqkoWH e4XIOhuw==; Received: from [95.87.234.74] (port=37074 helo=localhost.localdomain) by server28.superhosting.bg with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.93) (envelope-from ) id 1kcZ2u-0000tx-Ks; Tue, 10 Nov 2020 21:11:15 +0200 From: Dimitar Dimitrov To: gdb-patches@sourceware.org Subject: [PATCH] sim: pru: Add support for LMBD instruction Date: Tue, 10 Nov 2020 21:11:06 +0200 Message-Id: <20201110191106.6750-1-dimitar@dinux.eu> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-OutGoing-Spam-Status: No, score=-1.0 X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server28.superhosting.bg X-AntiAbuse: Original Domain - sourceware.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - dinux.eu X-Get-Message-Sender-Via: server28.superhosting.bg: authenticated_id: dimitar@dinux.eu X-Authenticated-Sender: server28.superhosting.bg: dimitar@dinux.eu X-Source: X-Source-Args: X-Source-Dir: X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces@sourceware.org Sender: "Gdb-patches" Binutils support for LMBD instruction was merged [1]. So add it also to simulator. LMBD instruction does left-most-bit-detection. It returns 32 if the given bit value is not found in the provided word value. [1] https://sourceware.org/pipermail/binutils/2020-October/113901.html sim/pru/ChangeLog: * pru.h (RS1SEL): New macro. (RS1_WIDTH): New macro. * pru.isa: Describe the LMBD instruction. sim/testsuite/sim/pru/ChangeLog: * lmbd.s: New test. Signed-off-by: Dimitar Dimitrov --- sim/pru/pru.h | 2 ++ sim/pru/pru.isa | 15 +++++++++ sim/testsuite/sim/pru/lmbd.s | 61 ++++++++++++++++++++++++++++++++++++ 3 files changed, 78 insertions(+) create mode 100644 sim/testsuite/sim/pru/lmbd.s diff --git a/sim/pru/pru.h b/sim/pru/pru.h index 240fc30010..cbcc3ef9d7 100644 --- a/sim/pru/pru.h +++ b/sim/pru/pru.h @@ -58,6 +58,8 @@ #define XBBO_BASEREG (CPU.regs[GET_INSN_FIELD (RS1, inst)]) +#define RS1SEL GET_INSN_FIELD (RS1SEL, inst) +#define RS1_WIDTH regsel_width (RS1SEL) #define RDSEL GET_INSN_FIELD (RDSEL, inst) #define RD_WIDTH regsel_width (RDSEL) #define RD_REGN GET_INSN_FIELD (RD, inst) diff --git a/sim/pru/pru.isa b/sim/pru/pru.isa index 050154560b..c7860d0191 100644 --- a/sim/pru/pru.isa +++ b/sim/pru/pru.isa @@ -247,3 +247,18 @@ INSTRUCTION (iloop, LOOP_IN_PROGRESS = 1; PC++; }) + +INSTRUCTION (lmbd, + { + int lmbd_i; + + OP2 = (IO ? IMM8 : RS2); + + for (lmbd_i = RS1_WIDTH - 1; lmbd_i >= 0; lmbd_i--) + { + if (!(((RS1 >> lmbd_i) ^ OP2) & 1)) + break; + } + RD = (lmbd_i < 0) ? 32 : lmbd_i; + PC++; + }) diff --git a/sim/testsuite/sim/pru/lmbd.s b/sim/testsuite/sim/pru/lmbd.s new file mode 100644 index 0000000000..9a9e7827b2 --- /dev/null +++ b/sim/testsuite/sim/pru/lmbd.s @@ -0,0 +1,61 @@ +# Check that lmbd insn works. +# mach: pru + +# Copyright (C) 2020 Free Software Foundation, Inc. +# Contributed by Dimitar Dimitrov +# +# This file is part of the GNU simulators. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +.include "testutils.inc" + + start + + ldi32 r14, 0xffffffff + ldi32 r15, 0x0 + ldi32 r16, 0x40000000 + ldi32 r17, 8 + + lmbd r0, r14, 0 + qbne 2f, r0, 32 + + lmbd r0, r14, 1 + qbne 2f, r0, 31 + + lmbd r0, r15, 1 + qbne 2f, r0, 32 + + lmbd r0, r15, 0 + qbne 2f, r0, 31 + + lmbd r0, r16, r15 + qbne 2f, r0, 31 + + lmbd r0, r16, 1 + qbne 2f, r0, 30 + + lmbd r0, r14.w1, 1 + qbne 2f, r0, 15 + + lmbd r0, r17.b0, 1 + qbne 2f, r0, 3 + + lmbd r0, r17.b0, r15 + qbne 2f, r0, 7 + + +1: + pass +2: fail -- 2.20.1