From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id 4Lj6Ec92qV/vbwAAWB0awg (envelope-from ) for ; Mon, 09 Nov 2020 12:05:19 -0500 Received: by simark.ca (Postfix, from userid 112) id 32B631F08E; Mon, 9 Nov 2020 12:05:18 -0500 (EST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on simark.ca X-Spam-Level: X-Spam-Status: No, score=0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,MAILING_LIST_MULTI,RDNS_NONE,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.2 Received: from sourceware.org (unknown [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id 1F60E1F086 for ; Mon, 9 Nov 2020 12:05:17 -0500 (EST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 6E6C43896C3C; Mon, 9 Nov 2020 17:05:16 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 6E6C43896C3C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1604941516; bh=Njjpy8w350iD8fzW0GpGK46mVpqqDSTMWRPTJVxOwh0=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=m5N/pjjud0TBYQ6hJOnrTjDe3kYeWMFschUaEjMk0LvlPsB54CcFNwZj3lkbF79Us PSP/kOuE+kQs7UkTOsvUn4jkRlmX3vrDqzI4bIkbDpsNVOPRcvJB+dxmLjMQSz2Ff1 S+RzHtsqkNEpg3L38s9ykFv1vnSOVA8iPOcamR14= Received: from mail-qt1-x82e.google.com (mail-qt1-x82e.google.com [IPv6:2607:f8b0:4864:20::82e]) by sourceware.org (Postfix) with ESMTPS id 3BE163896C09 for ; Mon, 9 Nov 2020 17:05:14 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 3BE163896C09 Received: by mail-qt1-x82e.google.com with SMTP id i12so6473032qtj.0 for ; Mon, 09 Nov 2020 09:05:14 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Njjpy8w350iD8fzW0GpGK46mVpqqDSTMWRPTJVxOwh0=; b=LIiWaR/EXN6wqaNcphvmukiM0aiWgN5Lt4NhjMSC5YCbHX8xgBKIavC2ys1vZ4LIYq lQao8FCS7kbib8ya50spbLYS8FE5FT0NIWpaA3isIY8VhHbYXMqCMnNPl0kOJm3kO+oH GZNlZ5E6V0P40+enFrwVYlDA0Vg1SGKNComxpjW/CaUByanCVyMrztLAzW7JujlucxRf gH82+KYlAhjXzOe0FpMFUd0K3pUaVQ1UPBn9Gq+vwHFjc+185Lgh8w9wz9vwnr7UI0ag Yuppo4Ebuf1Jl7Zqh+Tkkalnj8tbCzgDv6T5EGp41iOpjbkgEtbUzX4/swPo2whgngAh oVzw== X-Gm-Message-State: AOAM531/Tq0IdOqpUx8oqG3xaDmjeOZiRxfimgH81wgO2VNCIQnzCRyN OJ9LTkk6CTKzeNOaykD0soNZqwKFdjmkbQ== X-Google-Smtp-Source: ABdhPJynRvxnSpH+0BS8lie0kaNswnZSiV6MnDLQsPk278du+TpeD4Mz1yBYaXhcaaNwGWmUeaCpkQ== X-Received: by 2002:ac8:6b87:: with SMTP id z7mr5071598qts.143.1604941513424; Mon, 09 Nov 2020 09:05:13 -0800 (PST) Received: from localhost.localdomain ([2804:7f0:8284:1487:5c3b:b268:ad95:5f37]) by smtp.gmail.com with ESMTPSA id s2sm5948358qtw.44.2020.11.09.09.05.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Nov 2020 09:05:13 -0800 (PST) To: gdb-patches@sourceware.org Subject: [PATCH v3 14/24] AArch64: Implement the memory tagging gdbarch hooks Date: Mon, 9 Nov 2020 14:04:25 -0300 Message-Id: <20201109170435.15766-15-luis.machado@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201109170435.15766-1-luis.machado@linaro.org> References: <20201109170435.15766-1-luis.machado@linaro.org> X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Luis Machado via Gdb-patches Reply-To: Luis Machado Cc: david.spickett@linaro.org Errors-To: gdb-patches-bounces@sourceware.org Sender: "Gdb-patches" Updates on v2: - Update target methods to contain a tag type parameter. -- This patch implements the memory tagging gdbarch hooks for AArch64, for the MTE feature. gdb/ChangeLog: YYYY-MM-DD Luis Machado * aarch64-linux-tdep.c: Include target.h, arch-utils.h, value.h. (aarch64_linux_get_atag, aarch64_linux_tagged_address_p) (aarch64_linux_memtag_mismatch_p, aarch64_linux_set_memtags) (aarch64_linux_get_memtag, aarch64_linux_memtag_to_string): New functions. (aarch64_linux_init_abi): Initialize MTE-related gdbarch hooks. * arch/aarch64-mte-linux.c (make_ltag_bits, make_ltag) (aarch64_linux_set_ltag, aarch64_linux_get_ltag): New functions. * arch/aarch64-mte-linux.h (MTE_LOGICAL_TAG_START_BIT) (MTE_LOGICAL_MAX_VALUE): Define. (make_ltag_bits, make_ltag, aarch64_linux_set_ltag) (aarch64_linux_get_ltag): New prototype. --- gdb/aarch64-linux-tdep.c | 212 +++++++++++++++++++++++++++++++++++ gdb/arch/aarch64-mte-linux.c | 36 ++++++ gdb/arch/aarch64-mte-linux.h | 19 ++++ 3 files changed, 267 insertions(+) diff --git a/gdb/aarch64-linux-tdep.c b/gdb/aarch64-linux-tdep.c index 5f6fb42792..00c4f45035 100644 --- a/gdb/aarch64-linux-tdep.c +++ b/gdb/aarch64-linux-tdep.c @@ -30,6 +30,7 @@ #include "symtab.h" #include "tramp-frame.h" #include "trad-frame.h" +#include "target.h" #include "target/target.h" #include "regcache.h" @@ -46,6 +47,9 @@ #include "arch/aarch64-mte-linux.h" +#include "arch-utils.h" +#include "value.h" + /* Signal frame handling. +------------+ ^ @@ -1437,6 +1441,189 @@ aarch64_linux_gcc_target_options (struct gdbarch *gdbarch) return {}; } +/* Helper to get the allocation tag from a 64-bit ADDRESS. + + Return 0 for success and non-zero otherwise. */ + +static int +aarch64_linux_get_atag (CORE_ADDR address, CORE_ADDR *tag) +{ + gdb::byte_vector tags; + + /* Attempt to fetch the allocation tag. */ + if (target_fetch_memtags (address, 0, tags, tag_allocation) != 0) + return 1; + + /* Only one tag should've been returned. Make sure we got exactly that. */ + gdb_assert (tags.size () == 1); + + /* Although our tags are 4 bits in size, they are stored in a + byte. */ + *tag = tags[0]; + + return 0; +} + +/* Implement the tagged_address_p gdbarch method. */ + +static bool +aarch64_linux_tagged_address_p (struct gdbarch *gdbarch, struct value *address) +{ + gdb_assert (address != nullptr); + + CORE_ADDR addr = value_as_address (address); + + /* Remove the top byte for the memory range check. */ + addr = address_significant (gdbarch, addr); + + /* Check if the page that contains ADDRESS is mapped with PROT_MTE. */ + if (!linux_address_in_memtag_page (addr)) + return false; + + /* We have a valid tag in the top byte of the 64-bit address. */ + return true; +} + +/* Implement the memtag_mismatch_p gdbarch method. */ + +static bool +aarch64_linux_memtag_mismatch_p (struct gdbarch *gdbarch, + struct value *address) +{ + gdb_assert (address != nullptr); + + /* Make sure we are dealing with a tagged address to begin with. */ + if (!aarch64_linux_tagged_address_p (gdbarch, address)) + return false; + + CORE_ADDR addr = value_as_address (address); + + /* Fetch the allocation tag for ADDRESS. */ + CORE_ADDR atag = 0; + + if (aarch64_linux_get_atag (addr, &atag) != 0) + return false; + + /* Fetch the logical tag for ADDRESS. */ + gdb_byte ltag = aarch64_linux_get_ltag (addr); + + /* Are the tags the same? */ + if (ltag == atag) + return false; + + return true; +} + +/* Implement the set_memtags gdbarch method. */ + +static int +aarch64_linux_set_memtags (struct gdbarch *gdbarch, struct value *address, + size_t length, const gdb::byte_vector &tags, + enum memtag_type tag_type) +{ + if (tags.empty ()) + return 0; + + gdb_assert (address != nullptr); + + CORE_ADDR addr = value_as_address (address); + + /* Set the logical tag or the allocation tag. */ + if (tag_type == tag_logical) + { + /* When setting logical tags, we don't care about the length, since + we are only setting a single logical tag. */ + addr = aarch64_linux_set_ltag (addr, tags[0]); + + /* Update the value's content with the tag. */ + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); + gdb_byte *srcbuf = value_contents_raw (address); + store_unsigned_integer (srcbuf, sizeof (addr), byte_order, addr); + } + else + { + /* Make sure we are dealing with a tagged address to begin with. */ + if (!aarch64_linux_tagged_address_p (gdbarch, address)) + return 1; + + /* With G being the number of tag granules and N the number of tags + passed in, we can have the following cases: + + 1 - G == N: Store all the N tags to memory. + + 2 - G < N : Warn about having more tags than granules, but write G + tags. + + 3 - G > N : This is a "fill tags" operation. We should use the tags + as a pattern to fill the granules repeatedly until we have + written G tags to memory. + */ + + size_t g = get_tag_granules (addr, length, MTE_GRANULE_SIZE); + size_t n = tags.size (); + + if (g < n) + { + warning (_("Got more tags than memory granules. Tags will be " + "truncated.")); + } + else if (g > n) + warning (_("Using tag pattern to fill memory range.")); + + if (target_store_memtags (addr, length, tags, tag_allocation) != 0) + return 1; + } + return 0; +} + +/* Implement the get_memtag gdbarch method. */ + +static struct value * +aarch64_linux_get_memtag (struct gdbarch *gdbarch, struct value *address, + enum memtag_type tag_type) +{ + gdb_assert (address != nullptr); + + CORE_ADDR addr = value_as_address (address); + CORE_ADDR tag = 0; + + /* Get the logical tag or the allocation tag. */ + if (tag_type == tag_logical) + tag = aarch64_linux_get_ltag (addr); + else + { + /* Make sure we are dealing with a tagged address to begin with. */ + if (!aarch64_linux_tagged_address_p (gdbarch, address)) + return nullptr; + + if (aarch64_linux_get_atag (addr, &tag) != 0) + return nullptr; + } + + /* Convert the tag to a value. */ + return value_from_ulongest (builtin_type (gdbarch)->builtin_unsigned_int, + tag); +} + +/* Implement the memtag_to_string gdbarch method. */ + +static std::string +aarch64_linux_memtag_to_string (struct gdbarch *gdbarch, + struct value *address, + enum memtag_type tag_type) +{ + gdb_assert (address != nullptr); + + struct value *v_tag = aarch64_linux_get_memtag (gdbarch, address, tag_type); + + if (v_tag == nullptr && tag_allocation) + error (_("Error getting tag from target")); + + CORE_ADDR tag = value_as_address (v_tag); + + return string_printf ("0x%s", phex_nz (tag, sizeof (tag))); +} + static void aarch64_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) { @@ -1494,6 +1681,31 @@ aarch64_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) data associated with the address. */ set_gdbarch_significant_addr_bit (gdbarch, 56); + /* MTE-specific settings and hooks. */ + if (tdep->has_mte ()) + { + /* Register a hook for checking if an address is tagged or not. */ + set_gdbarch_tagged_address_p (gdbarch, aarch64_linux_tagged_address_p); + + /* Register a hook for checking if there is a memory tag mismatch. */ + set_gdbarch_memtag_mismatch_p (gdbarch, + aarch64_linux_memtag_mismatch_p); + + /* Register a hook for setting the logical/allocation tags for + a range of addresses. */ + set_gdbarch_set_memtags (gdbarch, aarch64_linux_set_memtags); + + /* Register a hook for extracting the logical/allocation tag from an + address. */ + set_gdbarch_get_memtag (gdbarch, aarch64_linux_get_memtag); + + /* Set the allocation tag granule size to 16 bytes. */ + set_gdbarch_memtag_granule_size (gdbarch, MTE_GRANULE_SIZE); + + /* Register a hook for converting a memory tag to a string. */ + set_gdbarch_memtag_to_string (gdbarch, aarch64_linux_memtag_to_string); + } + /* Initialize the aarch64_linux_record_tdep. */ /* These values are the size of the type that will be used in a system call. They are obtained from Linux Kernel source. */ diff --git a/gdb/arch/aarch64-mte-linux.c b/gdb/arch/aarch64-mte-linux.c index ee162aef19..5c02e5ef5b 100644 --- a/gdb/arch/aarch64-mte-linux.c +++ b/gdb/arch/aarch64-mte-linux.c @@ -32,3 +32,39 @@ get_tag_granules (CORE_ADDR addr, size_t len, size_t granule_size) /* We always have at least 1 granule. */ return 1 + (e_addr - s_addr) / granule_size; } + +/* See arch/aarch64-mte-linux.h */ + +CORE_ADDR +make_ltag_bits (CORE_ADDR value) +{ + return value & MTE_LOGICAL_MAX_VALUE; +} + +/* See arch/aarch64-mte-linux.h */ + +CORE_ADDR +make_ltag (CORE_ADDR value) +{ + return make_ltag_bits (value) << MTE_LOGICAL_TAG_START_BIT; +} + +/* See arch/aarch64-mte-linux.h */ + +CORE_ADDR +aarch64_linux_set_ltag (CORE_ADDR address, CORE_ADDR tag) +{ + /* Remove the existing tag. */ + address &= ~make_ltag (MTE_LOGICAL_MAX_VALUE); + + /* Return the new tagged address. */ + return address | make_ltag (tag); +} + +/* See arch/aarch64-mte-linux.h */ + +CORE_ADDR +aarch64_linux_get_ltag (CORE_ADDR address) +{ + return make_ltag_bits (address >> MTE_LOGICAL_TAG_START_BIT); +} diff --git a/gdb/arch/aarch64-mte-linux.h b/gdb/arch/aarch64-mte-linux.h index e555f0af19..5c5783f28b 100644 --- a/gdb/arch/aarch64-mte-linux.h +++ b/gdb/arch/aarch64-mte-linux.h @@ -32,10 +32,29 @@ /* We have one tag per 16 bytes of memory. */ #define MTE_GRANULE_SIZE 16 +#define MTE_LOGICAL_TAG_START_BIT 56 +#define MTE_LOGICAL_MAX_VALUE 0xf /* Return the number of tag granules in the memory range [ADDR, ADDR + LEN) given GRANULE_SIZE. */ extern size_t get_tag_granules (CORE_ADDR addr, size_t len, size_t granule_size); +/* Return the 4-bit tag made from VALUE. */ +extern CORE_ADDR make_ltag_bits (CORE_ADDR value); + +/* Return the 4-bit tag that can be OR-ed to an address. */ +extern CORE_ADDR make_ltag (CORE_ADDR value); + +/* Helper to set the logical TAG for a 64-bit ADDRESS. + + It is always possible to set the logical tag. */ +extern CORE_ADDR aarch64_linux_set_ltag (CORE_ADDR address, + CORE_ADDR tag); + +/* Helper to get the logical tag from a 64-bit ADDRESS. + + It is always possible to get the logical tag. */ +extern CORE_ADDR aarch64_linux_get_ltag (CORE_ADDR address); + #endif /* ARCH_AARCH64_LINUX_H */ -- 2.17.1