From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id 7qJIGzHlkV8PSQAAWB0awg (envelope-from ) for ; Thu, 22 Oct 2020 16:01:53 -0400 Received: by simark.ca (Postfix, from userid 112) id 58E871E89B; Thu, 22 Oct 2020 16:01:53 -0400 (EDT) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on simark.ca X-Spam-Level: X-Spam-Status: No, score=-1.1 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,MAILING_LIST_MULTI,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id 81E5B1E776 for ; Thu, 22 Oct 2020 16:01:51 -0400 (EDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 7C63D3987802; Thu, 22 Oct 2020 20:01:50 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7C63D3987802 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1603396910; bh=jtmETvlOi74qFTukA8wYjXkcKJtytoCdPAOefZU72J0=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=Tu6FN0YQxeZWzTiX+g+GZ93/d8lLpaSklzzIo177PHybA8Pn8qklc8LxLCoBUZMoO j+Oh36sebyjGnumM+D7X12vv6gU/xn7TqjwaOIduA8f/LZ1x0CIXEl6gbhVubBEYpH rXXj+CUYphSSdyiOsWwor1+xcY8Ws1CH5bEXfF9A= Received: from mail-qk1-x742.google.com (mail-qk1-x742.google.com [IPv6:2607:f8b0:4864:20::742]) by sourceware.org (Postfix) with ESMTPS id BF2253987539 for ; Thu, 22 Oct 2020 20:01:47 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org BF2253987539 Received: by mail-qk1-x742.google.com with SMTP id 140so3095656qko.2 for ; Thu, 22 Oct 2020 13:01:47 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jtmETvlOi74qFTukA8wYjXkcKJtytoCdPAOefZU72J0=; b=UQx5vq7DPJq+2qc6ciVqzsJR5QA3HxboPsTZcon8JfN2xeHFg/VUFRtllKAq2hFHS5 +h81c1mnLyYddSVjg2kNUOMHLQ2KmSs/nZex4gQ8HHFPTVWBzquP0rIOk6Z9PqHHtSYx /WEpwFEHnhXeCiYnRFGnltith+9SaUL11GLtuMyvRmasnP25wY6WkpX6/2cnjzrw1fwF MtajPvgNuHi3TrKIwr5DPnfFL5cARTYRDP0E6qXQ0NL1+c8XWVr2B/acwmdNqa2Cn7W0 Z2Hj9vbWnZeDofbsC2zHcfGxhCdhRaHtIvak6A1e+TNWkAzxXZTPHaOXpddT/sBc5fta Mw8w== X-Gm-Message-State: AOAM530aNGXt+Cwlzs70+kGDQXW0d8obeON4OLXAEklvEDoBj24QiQtK 5S6M7hWsQ7+UiKW04xh9nUIH1dv3tXE6uQ== X-Google-Smtp-Source: ABdhPJyPyi+uhkOR9KWcPo1Q1GmL0NVL3FVidVGzuzugDo87AminhZPfNV5X+HxEnV8Jg6zTLRBnAQ== X-Received: by 2002:a37:9942:: with SMTP id b63mr4551341qke.85.1603396907105; Thu, 22 Oct 2020 13:01:47 -0700 (PDT) Received: from localhost.localdomain ([2804:7f0:8284:1487:b9b1:f72a:8f1:600]) by smtp.gmail.com with ESMTPSA id a21sm1711208qkk.98.2020.10.22.13.01.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Oct 2020 13:01:46 -0700 (PDT) To: gdb-patches@sourceware.org Subject: [PATCH v2 17/24] AArch64: Add gdbserver MTE support Date: Thu, 22 Oct 2020 17:00:07 -0300 Message-Id: <20201022200014.5189-18-luis.machado@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201022200014.5189-1-luis.machado@linaro.org> References: <20201022200014.5189-1-luis.machado@linaro.org> X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Luis Machado via Gdb-patches Reply-To: Luis Machado Cc: david.spickett@linaro.org Errors-To: gdb-patches-bounces@sourceware.org Sender: "Gdb-patches" Updates on v2: - Updated target methods to contain a tag type parameter. -- Adds the AArch64-specific memory tagging support (MTE) by implementing the required hooks and checks for GDBserver. gdbserver/ChangeLog: YYYY-MM-DD Luis Machado * Makefile.in (SFILES): Add /../gdb/nat/aarch64-mte-linux-ptrace.c. * configure.srv (aarch64*-*-linux*): Add arch/aarch64-mte-linux.o and nat/aarch64-mte-linux-ptrace.o. * linux-aarch64-low.cc: Include nat/aarch64-mte-linux-ptrace.h. (class aarch64_target) : New method overrides. (aarch64_target::supports_memory_tagging) (aarch64_target::fetch_memtags) (aarch64_target::store_memtags): New methods. --- gdbserver/Makefile.in | 1 + gdbserver/configure.srv | 2 ++ gdbserver/linux-aarch64-low.cc | 61 ++++++++++++++++++++++++++++++++++ 3 files changed, 64 insertions(+) diff --git a/gdbserver/Makefile.in b/gdbserver/Makefile.in index 1969ed0ec3..45b605c3b5 100644 --- a/gdbserver/Makefile.in +++ b/gdbserver/Makefile.in @@ -221,6 +221,7 @@ SFILES = \ $(srcdir)/../gdb/arch/ppc-linux-common.c \ $(srcdir)/../gdb/arch/riscv.c \ $(srcdir)/../gdb/nat/aarch64-sve-linux-ptrace.c \ + $(srcdir)/../gdb/nat/aarch64-mte-linux-ptrace.c \ $(srcdir)/../gdb/nat/linux-btrace.c \ $(srcdir)/../gdb/nat/linux-namespaces.c \ $(srcdir)/../gdb/nat/linux-osdata.c \ diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv index 833ad27c4c..0bbd990758 100644 --- a/gdbserver/configure.srv +++ b/gdbserver/configure.srv @@ -52,8 +52,10 @@ case "${gdbserver_host}" in srv_tgtobj="$srv_tgtobj nat/aarch64-linux.o" srv_tgtobj="$srv_tgtobj arch/aarch64-insn.o" srv_tgtobj="$srv_tgtobj arch/aarch64.o" + srv_tgtobj="$srv_tgtobj arch/aarch64-mte-linux.o" srv_tgtobj="$srv_tgtobj linux-aarch64-tdesc.o" srv_tgtobj="$srv_tgtobj nat/aarch64-sve-linux-ptrace.o" + srv_tgtobj="$srv_tgtobj nat/aarch64-mte-linux-ptrace.o" srv_tgtobj="${srv_tgtobj} $srv_linux_obj" srv_linux_regsets=yes srv_linux_thread_db=yes diff --git a/gdbserver/linux-aarch64-low.cc b/gdbserver/linux-aarch64-low.cc index 22485d9466..2c6de1903b 100644 --- a/gdbserver/linux-aarch64-low.cc +++ b/gdbserver/linux-aarch64-low.cc @@ -44,12 +44,17 @@ #include "linux-aarch32-tdesc.h" #include "linux-aarch64-tdesc.h" #include "nat/aarch64-sve-linux-ptrace.h" +#include "nat/aarch64-mte-linux-ptrace.h" #include "tdesc.h" #ifdef HAVE_SYS_REG_H #include #endif +#ifdef HAVE_GETAUXVAL +#include +#endif + /* Linux target op definitions for the AArch64 architecture. */ class aarch64_target : public linux_process_target @@ -82,6 +87,14 @@ public: struct emit_ops *emit_ops () override; + bool supports_memory_tagging () override; + + int fetch_memtags (CORE_ADDR address, size_t len, + gdb::byte_vector &tags, int type) override; + + int store_memtags (CORE_ADDR address, size_t len, + const gdb::byte_vector &tags, int type) override; + protected: void low_arch_setup () override; @@ -3201,6 +3214,54 @@ aarch64_target::breakpoint_kind_from_current_state (CORE_ADDR *pcptr) return arm_breakpoint_kind_from_current_state (pcptr); } +/* Returns true if memory tagging is supported. */ +bool +aarch64_target::supports_memory_tagging () +{ + if (current_thread == NULL) + { + /* We don't have any processes running, so don't attempt to + use linux_get_hwcap2 as it will try to fetch the current + thread id. Instead, just fetch the auxv from the self + PID. */ +#ifdef HAVE_GETAUXVAL + return (getauxval (AT_HWCAP2) & HWCAP2_MTE) != 0; +#else + return true; +#endif + } + + return (linux_get_hwcap2 (8) & HWCAP2_MTE) != 0; +} + +int +aarch64_target::fetch_memtags (CORE_ADDR address, size_t len, + gdb::byte_vector &tags, int type) +{ + /* Allocation tags are per-process, so any tid is fine. */ + int tid = lwpid_of (current_thread); + + /* Allocation tag? */ + if (type == 1) + return aarch64_mte_fetch_memtags (tid, address, len, tags); + + return 1; +} + +int +aarch64_target::store_memtags (CORE_ADDR address, size_t len, + const gdb::byte_vector &tags, int type) +{ + /* Allocation tags are per-process, so any tid is fine. */ + int tid = lwpid_of (current_thread); + + /* Allocation tag? */ + if (type == 1) + return aarch64_mte_store_memtags (tid, address, len, tags); + + return 1; +} + /* The linux target ops object. */ linux_process_target *the_linux_target = &the_aarch64_target; -- 2.17.1