From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qk1-x743.google.com (mail-qk1-x743.google.com [IPv6:2607:f8b0:4864:20::743]) by sourceware.org (Postfix) with ESMTPS id B06B1382E04F for ; Wed, 15 Jul 2020 19:49:44 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org B06B1382E04F Received: by mail-qk1-x743.google.com with SMTP id j80so3052949qke.0 for ; Wed, 15 Jul 2020 12:49:44 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=LK9iqud3JSsLW6G93jV6Lfy+qohVvnTSAlitJVFN5Y4=; b=TniM4R/xo5enZPmUBGzayC6Ftgz6psbREwvv0SP+shQOv2Ph9+YFyo8zXxIwwBEijx qIpLGi882q1vON/B4VoSyINFs5LvNeFcGr3UkrySc2bA2x7QkHeMHPK4YmRA3SRjB/nC Ko2JcGd5FWUwnGvjefg7YMAywdOz5O3OqPpF2PvL39/H/od0S6dnd04FIj5aZR+E4loi r8ci1QyiiVEWRuW+uV8ZxLYW+zPxVRNSLqtDwMtXbcYr+OlF8v9xSCAiEModGWX1hZVM wnvg30PthF42Sd8+ornIFIp+CxKKuXE2E6mH40F0+6aTLqxzM1677o6gv14dHPIJm24Y lyuA== X-Gm-Message-State: AOAM531YLuIcRxFtwz7hMM6D5HOJAaVZrGbjFdoAvGSpvsaDBgzuBe+S PaBNbc3fyhDOdeagB/wTVgWVTw2T4ZWc2w== X-Google-Smtp-Source: ABdhPJzWsoyj+/KgyCY/EkoP1EpUzCMqJKUlW6Qw6oi0yFHF7llbRAjMkrxH3qu0gRvg6yu63xHpBA== X-Received: by 2002:a37:e4e:: with SMTP id 75mr706035qko.81.1594842583564; Wed, 15 Jul 2020 12:49:43 -0700 (PDT) Received: from localhost.localdomain ([2804:7f0:8283:82c3:9daa:7611:ebe6:931]) by smtp.gmail.com with ESMTPSA id z18sm4340537qta.51.2020.07.15.12.49.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jul 2020 12:49:43 -0700 (PDT) From: Luis Machado To: gdb-patches@sourceware.org, Alan.Hayward@arm.com Cc: omair.javaid@linaro.org, catalin.marinas@arm.com, david.spickett@linaro.org, jose.marchesi@oracle.com Subject: [PATCH 19/23] Documentation for the new mtag commands Date: Wed, 15 Jul 2020 16:45:09 -0300 Message-Id: <20200715194513.16641-20-luis.machado@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200715194513.16641-1-luis.machado@linaro.org> References: <20200715194513.16641-1-luis.machado@linaro.org> X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 15 Jul 2020 19:49:46 -0000 Document the new "mtag" command prefix and all of its subcommands. gdb/doc/ChangeLog: YYYY-MM-DD Luis Machado * gdb.textinfo (Memory Tagging): New subsection. (AArch64 Memory Tagging Extension): New subsection. --- gdb/doc/gdb.texinfo | 60 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index bc610e44cd..4156d1d70a 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -10806,6 +10806,49 @@ target supports computing the CRC checksum of a block of memory (@pxref{qCRC packet}). @end table +@subsection Memory Tagging + +Memory tagging is a memory protection technology that validates accesses +through pointers via a tag. Both the pointer tag and the memory tag in the +physical address space must match for the memory access to be validated. + +There are two types of tags: logical and allocation. The logical tag is +stored in the pointers themselves. The allocation tag is the tag associated +with the physical address space, against which the logical tags from pointers +are validated. + +If the underlying architecture supports memory tagging, like AArch64, +@value{GDBN} can make use of it to validate addresses and pointers against +memory allocation tags. + +A command prefix of @code{mtag} gives access to the various memory tagging +commands. + +The @code{mtag} commands are the following: + +@table @code +@kindex mtag showltag +@item mtag showltag @var{address_expression} +Show the logical tag contained in the pointer resulting from evaluating the +argument expression. +@kindex mtag setltag +@item mtag setltag @var{address_expression} @var{tag_bytes} +Print the resulting pointer from evaluating the argument expression with a +logical tag of @var{tag_bytes}. +@kindex mtag showatag +@item mtag showatag @var{address_expression} +Show the allocation tag from the memory address pointed to by the evaluation +of the argument expression. +@kindex mtag setatag +@item mtag setatag @var{starting_address} @var{length} @var{tag_bytes} +Set the allocation tag for memory range @r{[}@var{starting_address}, +@var{starting_address} + @var{length}@r{)} to @var{tag_bytes}. +@kindex mtag check +@item mtag check @var{address_expression} +Given the pointer resulting from evaluating the argument expression, check that +the logical tag and the allocation tags match. +@end table + @node Auto Display @section Automatic Display @cindex automatic display @@ -24846,6 +24889,23 @@ When GDB prints a backtrace, any addresses that required unmasking will be postfixed with the marker [PAC]. When using the MI, this is printed as part of the @code{addr_flags} field. +@subsubsection AArch64 Memory Tagging Extension. +@cindex AArch64 Memory Tagging Extension. + +When @value{GDBN} is debugging the AArch64 architecture, the program is +using the v8.5-A feature Memory Tagging Extension (MTE) and there is support +in the kernel for MTE, @value{GDBN} will make memory tagging functionality +available for inspection and editing of logical and allocation tags. + +To aid debugging, @value{GDBN} will output additional information when SIGSEGV +signals are generated as a result of memory tag failures. + +A new register, @code{tag_ctl}, is made available through the +@code{org.gnu.gdb.aarch64.mte} feature. This register exposes some +options that can be controlled at runtime and emulates the @code{prctl} +option @code{PR_SET_TAGGED_ADDR_CTRL}. For further information, see the +documentation in the Linux kernel. + @node i386 @subsection x86 Architecture-specific Issues -- 2.17.1