From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from hqnvemgate24.nvidia.com (hqnvemgate24.nvidia.com [216.228.121.143]) by sourceware.org (Postfix) with ESMTPS id A70B33840C3B for ; Wed, 24 Jun 2020 01:29:09 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org A70B33840C3B Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Tue, 23 Jun 2020 18:27:36 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 23 Jun 2020 18:29:08 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 23 Jun 2020 18:29:08 -0700 Received: from nvbus.nvidia.com (10.124.1.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 24 Jun 2020 01:29:08 +0000 From: Victor Collod To: Subject: [PATCH v3 2/7] amd64_analyze_prologue: swap upper bound check condition operands Date: Tue, 23 Jun 2020 18:28:52 -0700 Message-ID: <20200624012857.31849-3-vcollod@nvidia.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200624012857.31849-1-vcollod@nvidia.com> References: <0cc93067-1313-6434-4330-61a21736376f@simark.ca> <20200624012857.31849-1-vcollod@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL101.nvidia.com (172.20.187.10) To HQMAIL107.nvidia.com (172.20.187.13) X-Spam-Status: No, score=-10.3 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 24 Jun 2020 01:29:10 -0000 `if (current_pc <=3D pc)' felt backwards, as current_pc doesn't change, and the test could be described as "stop if pc went past current_pc". 2020-06-23 Victor Collod * amd64-tdep.c (amd64_analyze_prologue): Swap upper bound check condition operands. --- gdb/amd64-tdep.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c index 0ce9fbc2997..ff12cb874b8 100644 --- a/gdb/amd64-tdep.c +++ b/gdb/amd64-tdep.c @@ -2387,7 +2387,8 @@ amd64_analyze_prologue (struct gdbarch *gdbarch, gdb_byte buf[3]; gdb_byte op; =20 - if (current_pc <=3D pc) + /* Analysis must not go past current_pc. */ + if (pc >=3D current_pc) return current_pc; =20 if (gdbarch_ptr_bit (gdbarch) =3D=3D 32) @@ -2408,7 +2409,8 @@ amd64_analyze_prologue (struct gdbarch *gdbarch, op =3D read_code_unsigned_integer (pc, 1, byte_order); } =20 - if (current_pc <=3D pc) + /* If we went past the allowed bound, stop. */ + if (pc >=3D current_pc) return current_pc; =20 if (op =3D=3D 0x55) /* pushq %rbp */ @@ -2418,8 +2420,8 @@ amd64_analyze_prologue (struct gdbarch *gdbarch, cache->saved_regs[AMD64_RBP_REGNUM] =3D 0; cache->sp_offset +=3D 8; =20 - /* If that's all, return now. */ - if (current_pc <=3D pc + 1) + /* If we went past the allowed bound, stop. */ + if (pc + 1 >=3D current_pc) return current_pc; =20 read_code (pc + 1, buf, 3); --=20 2.20.1