From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 53274 invoked by alias); 22 May 2019 12:05:30 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 53266 invoked by uid 89); 22 May 2019 12:05:30 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-15.4 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.1 spammy=HX-Languages-Length:1808 X-HELO: mail-wr1-f66.google.com Received: from mail-wr1-f66.google.com (HELO mail-wr1-f66.google.com) (209.85.221.66) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 22 May 2019 12:05:29 +0000 Received: by mail-wr1-f66.google.com with SMTP id e15so2007969wrs.4 for ; Wed, 22 May 2019 05:05:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=embecosm.com; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=dcKItD/qN+MgwHiZKteFCj5y83vL12nAZQ8op73tvPk=; b=dB0/T4j3n949YQIPK74Sy0eQCz8wC+dxpUT1nAbDvf+0CZl8PXjypaUBeBj5q3uQhY HFFSvFb+pTQxHNvgYPSdPCKuErGhEXUtp1ULrBR+Th3g+0hFsk4SiIsVAnjbJvPMGzhl IN/2W6JELtFs7oi7ghrHQzqa7BV+yzUhqYP0EZh0Su2QWYgaC818w/0X7HdZC/E8olrr fDKFvjqxrFHb3w7OcBGKOQFF6mIOu2XOS/a6+ARBfe3Mmln1VL18rIhmK4Rz5yRqioiR eXM0bpdij0f9xfrjAqHsDzXxKnEwb01vf4QfPB3vTSoM3o92Y3cI/h5eHD/fZZj0zStu aUHw== Return-Path: Received: from localhost (cust64-dsl91-135-5.idnet.net. [91.135.5.64]) by smtp.gmail.com with ESMTPSA id o4sm7426869wmo.20.2019.05.22.05.05.26 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 22 May 2019 05:05:26 -0700 (PDT) Date: Wed, 22 May 2019 12:05:00 -0000 From: Andrew Burgess To: Simon Cook Cc: gdb-patches@sourceware.org Subject: Re: [PATCH] gdb/riscv: Improve flen length determiniation Message-ID: <20190522120525.GI2568@embecosm.com> References: <20190522113745.26750-1-simon.cook@embecosm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190522113745.26750-1-simon.cook@embecosm.com> X-Fortune: Sleep is for the weak and sickly. X-Editor: GNU Emacs [ http://www.gnu.org/software/emacs ] User-Agent: Mutt/1.9.2 (2017-12-15) X-IsSubscribed: yes X-SW-Source: 2019-05/txt/msg00489.txt.bz2 * Simon Cook [2019-05-22 12:37:45 +0100]: > This solves an assertion failure when a remote provides a target > description which only refers to floating point registers by their > hardware name (e.g. f0), rather than their ABI name (e.g. ft0). GDB > assumed that should the floating point register feature be presented, > it would contain a register called ft0. > > The floating point length is now instead determined by searching for > the same register, but looking for any of its aliases. > > gdb/ChangeLog: > > * riscv-tdep.c (riscv_gdbarch_init): Support determining flen from > target descriptions using exclusively floating point register name > aliases. Thanks for looking at this. I've pushed your patch to master. Thanks, Andrew > --- > gdb/ChangeLog | 6 ++++++ > gdb/riscv-tdep.c | 17 ++++++++++++++++- > 2 files changed, 22 insertions(+), 1 deletion(-) > > diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c > index 4fe07ef437..072c8e3720 100644 > --- a/gdb/riscv-tdep.c > +++ b/gdb/riscv-tdep.c > @@ -3094,7 +3094,22 @@ riscv_gdbarch_init (struct gdbarch_info info, > valid_p &= riscv_check_tdesc_feature (tdesc_data, feature_fpu, > &riscv_freg_feature); > > - int bitsize = tdesc_register_bitsize (feature_fpu, "ft0"); > + /* Search for the first floating point register (by any alias), to > + determine the bitsize. */ > + int bitsize = -1; > + const auto &fp0 = riscv_freg_feature.registers[0]; > + > + for (const char *name : fp0.names) > + { > + if (tdesc_unnumbered_register (feature_fpu, name)) > + { > + bitsize = tdesc_register_bitsize (feature_fpu, name); > + break; > + } > + } > + > + gdb_assert (bitsize != -1); > + > features.flen = (bitsize / 8); > > if (riscv_debug_gdbarch) > -- > 2.17.1 >