From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 35128 invoked by alias); 6 Mar 2019 13:33:47 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 35014 invoked by uid 89); 6 Mar 2019 13:33:46 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.9 required=5.0 tests=BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,RCVD_IN_DNSWL_NONE,SPF_HELO_PASS,SPF_PASS autolearn=ham version=3.3.2 spammy=6229 X-HELO: EUR03-VE1-obe.outbound.protection.outlook.com Received: from mail-eopbgr50089.outbound.protection.outlook.com (HELO EUR03-VE1-obe.outbound.protection.outlook.com) (40.107.5.89) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 06 Mar 2019 13:33:43 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=I2seL2NSgSMdrbcErxpfkqTgaPNxuOjFbuDU9kAVNPA=; b=YW/Ph21iFvhfsc2ydrgQqgglCtyx8gcWQ5nzNca4Fl3IgS3gPdUlyxBeuV5G4xXuW17Exvlm5Qpj5NyHz6cY2k3BJqAGRjyZIqG/q+omMV8oo7oT89P3uQD1IanhPt96OPgIOZASbGiflW7pWOokHPcvkcOnE0dWvRPmNvoTtlc= Received: from DB6PR0802MB2133.eurprd08.prod.outlook.com (10.172.227.22) by DB6PR0802MB2406.eurprd08.prod.outlook.com (10.172.250.9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1665.19; Wed, 6 Mar 2019 13:33:37 +0000 Received: from DB6PR0802MB2133.eurprd08.prod.outlook.com ([fe80::e974:35a7:c83c:e5b7]) by DB6PR0802MB2133.eurprd08.prod.outlook.com ([fe80::e974:35a7:c83c:e5b7%3]) with mapi id 15.20.1686.018; Wed, 6 Mar 2019 13:33:37 +0000 From: Alan Hayward To: "gdb-patches@sourceware.org" CC: nd , Alan Hayward Subject: [PATCH v2 7/8] AArch64: Prologue scan unwinder support for signed return addresses Date: Wed, 06 Mar 2019 13:33:00 -0000 Message-ID: <20190306133325.2531-8-alan.hayward@arm.com> References: <20190306133325.2531-1-alan.hayward@arm.com> In-Reply-To: <20190306133325.2531-1-alan.hayward@arm.com> authentication-results: spf=none (sender IP is ) smtp.mailfrom=Alan.Hayward@arm.com; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-IsSubscribed: yes X-SW-Source: 2019-03/txt/msg00086.txt.bz2 Pauth address signing is enabled at binary compile time. When enabled the return addresses for functions may be mangled. This patch adds functionali= ty to restore the original address for use in the prologue scan unwinder. In the prologue analyzer, check for PACIASP/PACIBSP (enable address manglin= g) and AUTIASP/AUTIBSP (disable address mangling). When unwinding the PC from the prologue, unmask the register if required. Add a test case to the prologue tests. 2019-03-06 Alan Hayward Jiong Wang * aarch64-tdep.c (aarch64_analyze_prologue): Check for pauth instructions. (aarch64_analyze_prologue_test): Add PACIASP test. (aarch64_prologue_prev_register): Unmask PC value. --- gdb/aarch64-tdep.c | 89 ++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 83 insertions(+), 6 deletions(-) diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c index 07430c0f25..247d0ed4c6 100644 --- a/gdb/aarch64-tdep.c +++ b/gdb/aarch64-tdep.c @@ -476,6 +476,37 @@ aarch64_analyze_prologue (struct gdbarch *gdbarch, /* Stop analysis on branch. */ break; } + else if (inst.opcode->iclass =3D=3D ic_system) + { + struct gdbarch_tdep *tdep =3D gdbarch_tdep (gdbarch); + int ra_state_val =3D 0; + + if (insn =3D=3D 0xd503233f /* paciasp. */ + || insn =3D=3D 0xd503237f /* pacibsp. */) + { + /* Return addresses are mangled. */ + ra_state_val =3D 1; + } + else if (insn =3D=3D 0xd50323bf /* autiasp. */ + || insn =3D=3D 0xd50323ff /* autibsp. */) + { + /* Return addresses are not mangled. */ + ra_state_val =3D 0; + } + else + { + if (aarch64_debug) + debug_printf ("aarch64: prologue analysis gave up addr=3D%s" + " opcode=3D0x%x (iclass)\n", + core_addr_to_string_nz (start), insn); + break; + } + + if (tdep->has_pauth () && cache !=3D nullptr) + trad_frame_set_value (cache->saved_regs, + tdep->pauth_ra_state_regnum, + ra_state_val); + } else { if (aarch64_debug) @@ -582,11 +613,13 @@ aarch64_analyze_prologue_test (void) struct gdbarch *gdbarch =3D gdbarch_find_by_info (info); SELF_CHECK (gdbarch !=3D NULL); =20 + struct aarch64_prologue_cache cache; + cache.saved_regs =3D trad_frame_alloc_saved_regs (gdbarch); + + struct gdbarch_tdep *tdep =3D gdbarch_tdep (gdbarch); + /* Test the simple prologue in which frame pointer is used. */ { - struct aarch64_prologue_cache cache; - cache.saved_regs =3D trad_frame_alloc_saved_regs (gdbarch); - static const uint32_t insns[] =3D { 0xa9af7bfd, /* stp x29, x30, [sp,#-272]! */ 0x910003fd, /* mov x29, sp */ @@ -622,9 +655,6 @@ aarch64_analyze_prologue_test (void) /* Test a prologue in which STR is used and frame pointer is not used. */ { - struct aarch64_prologue_cache cache; - cache.saved_regs =3D trad_frame_alloc_saved_regs (gdbarch); - static const uint32_t insns[] =3D { 0xf81d0ff3, /* str x19, [sp, #-48]! */ 0xb9002fe0, /* str w0, [sp, #44] */ @@ -664,6 +694,45 @@ aarch64_analyze_prologue_test (void) =3D=3D -1); } } + + /* Test a prologue in which there is a return address signing instructio= n. */ + if (tdep->has_pauth ()) + { + static const uint32_t insns[] =3D { + 0xd503233f, /* paciasp */ + 0xa9bd7bfd, /* stp x29, x30, [sp, #-48]! */ + 0x910003fd, /* mov x29, sp */ + 0xf801c3f3, /* str x19, [sp, #28] */ + 0xb9401fa0, /* ldr x19, [x29, #28] */ + }; + instruction_reader_test reader (insns); + + CORE_ADDR end =3D aarch64_analyze_prologue (gdbarch, 0, 128, &cache, + reader); + + SELF_CHECK (end =3D=3D 4 * 4); + SELF_CHECK (cache.framereg =3D=3D AARCH64_FP_REGNUM); + SELF_CHECK (cache.framesize =3D=3D 48); + + for (int i =3D 0; i < AARCH64_X_REGISTER_COUNT; i++) + { + if (i =3D=3D 19) + SELF_CHECK (cache.saved_regs[i].addr =3D=3D -20); + else if (i =3D=3D AARCH64_FP_REGNUM) + SELF_CHECK (cache.saved_regs[i].addr =3D=3D -48); + else if (i =3D=3D AARCH64_LR_REGNUM) + SELF_CHECK (cache.saved_regs[i].addr =3D=3D -40); + else + SELF_CHECK (cache.saved_regs[i].addr =3D=3D -1); + } + + if (tdep->has_pauth ()) + { + SELF_CHECK (trad_frame_value_p (cache.saved_regs, + tdep->pauth_ra_state_regnum)); + SELF_CHECK (cache.saved_regs[tdep->pauth_ra_state_regnum].addr =3D=3D 1= ); + } + } } } // namespace selftests #endif /* GDB_SELF_TEST */ @@ -873,8 +942,16 @@ aarch64_prologue_prev_register (struct frame_info *thi= s_frame, if (prev_regnum =3D=3D AARCH64_PC_REGNUM) { CORE_ADDR lr; + struct gdbarch *gdbarch =3D get_frame_arch (this_frame); + struct gdbarch_tdep *tdep =3D gdbarch_tdep (gdbarch); =20 lr =3D frame_unwind_register_unsigned (this_frame, AARCH64_LR_REGNUM= ); + + if (tdep->has_pauth () + && trad_frame_value_p (cache->saved_regs, + tdep->pauth_ra_state_regnum)) + lr =3D aarch64_frame_unmask_address (tdep, this_frame, lr); + return frame_unwind_got_constant (this_frame, prev_regnum, lr); } =20 --=20 2.17.2 (Apple Git-113)