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From: Simon Marchi <simon.marchi@ericsson.com>
To: "gdb-patches@sourceware.org" <gdb-patches@sourceware.org>
Cc: Markus Metzger <markus.t.metzger@intel.com>,
	Simon Marchi	<simon.marchi@ericsson.com>
Subject: [PATCH] Fix is_amd64_regs_target check in i386-avx512.exp
Date: Fri, 28 Sep 2018 20:41:00 -0000	[thread overview]
Message-ID: <20180928204114.20491-1-simon.marchi@ericsson.com> (raw)

As reported by Jan here:

  https://sourceware.org/ml/gdb-patches/2018-09/msg00831.html

the check that sets the number of available registers seems backwards.
I can't test this patch however, since I don't have access to a cpu with
AVX512.  Could somebody perhaps from Intel, or somebody else that has
access to such CPU, take a look?

Alternatively, do you know if a machine in the GCC compile farm has this
feature?  I didn't find any, but maybe I didn't look enough.

gdb/testsuite/ChangeLog:

	* gdb.arch/i386-avx512.exp: Fix setting of nr_regs based on
	is_amd64_regs_target.
---
 gdb/testsuite/gdb.arch/i386-avx512.exp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gdb/testsuite/gdb.arch/i386-avx512.exp b/gdb/testsuite/gdb.arch/i386-avx512.exp
index de2f62c3e1f..f27af534cfd 100644
--- a/gdb/testsuite/gdb.arch/i386-avx512.exp
+++ b/gdb/testsuite/gdb.arch/i386-avx512.exp
@@ -93,9 +93,9 @@ gdb_test "break [gdb_get_line_number "third breakpoint here"]" \
 gdb_continue_to_breakpoint "continue to third breakpoint in main"
 
 if [is_amd64_regs_target] {
-    set nr_regs 8
-} else {
     set nr_regs 32
+} else {
+    set nr_regs 8
 }
 
 for { set r 0 } { $r < $nr_regs } { incr r } {
-- 
2.19.0


             reply	other threads:[~2018-09-28 20:41 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-28 20:41 Simon Marchi [this message]
2018-10-01  9:49 ` Metzger, Markus T
2018-10-01 16:04   ` Simon Marchi

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