From: Alan Hayward <alan.hayward@arm.com>
To: gdb-patches@sourceware.org
Cc: nd@arm.com, Alan Hayward <alan.hayward@arm.com>
Subject: [PATCH] Add SVE to NEWS and GDB manual
Date: Tue, 21 Aug 2018 12:53:00 -0000 [thread overview]
Message-ID: <20180821125326.19936-1-alan.hayward@arm.com> (raw)
I wasn't sure whether the vector length limitation should
get added to these files - I couldn't find any other limitations
stated in these files. Happy to remove those parts / move elsewhere.
Also corrected vector gradient to vector granule, as per DWARF spec.
Ok for 8.2 branch too?
2018-08-21 Alan Hayward <alan.hayward@arm.com>
gdb/
* NEWS: Add SVE to 8.2 section.
* doc/gdb.texinfo: Add SVE to AArch64 section.
* arch/aarch64.h (aarch64_regnum): Update comment.
---
gdb/NEWS | 3 +++
gdb/arch/aarch64.h | 4 ++--
gdb/doc/gdb.texinfo | 16 ++++++++++++++++
3 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/gdb/NEWS b/gdb/NEWS
index 16d3d72589..3119d97d98 100644
--- a/gdb/NEWS
+++ b/gdb/NEWS
@@ -90,6 +90,9 @@ GNU/Linux/RISC-V riscv*-*-linux*
* C expressions can now use _Alignof, and C++ expressions can now use
alignof.
+* Support for SVE on AArch64 Linux. Note that in 8.2, GDB does not detect
+ changes to the vector length while the process is running.
+
* New commands
set debug fbsd-nat
diff --git a/gdb/arch/aarch64.h b/gdb/arch/aarch64.h
index e344a36770..d6b88e6d56 100644
--- a/gdb/arch/aarch64.h
+++ b/gdb/arch/aarch64.h
@@ -49,7 +49,7 @@ enum aarch64_regnum
AARCH64_SVE_P15_REGNUM = AARCH64_SVE_P0_REGNUM + 15, /* Last SVE predicate
register. */
AARCH64_SVE_FFR_REGNUM, /* SVE First Fault Register. */
- AARCH64_SVE_VG_REGNUM, /* SVE Vector Gradient. */
+ AARCH64_SVE_VG_REGNUM, /* SVE Vector Granule. */
/* Other useful registers. */
AARCH64_LAST_X_ARG_REGNUM = AARCH64_X0_REGNUM + 7,
@@ -71,7 +71,7 @@ enum aarch64_regnum
The number of bytes in an SVE Z register.
VQ : Vector Quotient.
The number of 128bit chunks in an SVE Z register.
- VG : Vector Gradient.
+ VG : Vector Granule.
The number of 64bit chunks in an SVE Z register. */
#define sve_vg_from_vl(vl) ((vl) / 8)
diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
index 433a2698a9..4526a385d0 100644
--- a/gdb/doc/gdb.texinfo
+++ b/gdb/doc/gdb.texinfo
@@ -23451,6 +23451,22 @@ Show whether AArch64 debugging messages are displayed.
@end table
+@subsubsection AArch64 SVE.
+@cindex AArch64 SVE.
+
+When GDB is debugging the AArch64 architecture, if the Scalable Vector
+Extension (SVE) is present then GDB will provide the vector registers
+@code{$z0} through @code{$z31}, vector predicate registers @code{$p0} through
+@code{$p15}, and the @code{$ffr} register. In addition the pseduo register
+@code{$vg} will be provided. This is the vector granule for the current thread
+and represents the number of 64-bit chunks in a SVE Z register.
+
+If the vector length changes, then the @code{$vg} register will be updated,
+but the lengths of the @code{z} and @code{p} registers will not change. This
+is a known limitation of GDB and does not affect the execution of the target
+process.
+
+
@node i386
@subsection x86 Architecture-specific Issues
--
2.15.2 (Apple Git-101.1)
next reply other threads:[~2018-08-21 12:53 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-21 12:53 Alan Hayward [this message]
2018-08-21 14:36 ` Pedro Alves
2018-08-21 17:29 ` Alan Hayward
2018-08-21 17:58 ` Eli Zaretskii
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