Mirror of the gdb-patches mailing list
 help / color / mirror / Atom feed
From: Pedro Franco de Carvalho <pedromfc@linux.vnet.ibm.com>
To: gdb-patches@sourceware.org
Subject: [PATCH 5/8] [PowerPC] Fix access to VSCR in linux targets
Date: Thu, 10 May 2018 21:46:00 -0000	[thread overview]
Message-ID: <20180510195840.17734-6-pedromfc@linux.vnet.ibm.com> (raw)
In-Reply-To: <20180510195840.17734-1-pedromfc@linux.vnet.ibm.com>

The 4-byte VSCR register is found inside a 16-byte field in the regset
returned by ptrace and in core files. The position of VSCR depends on
the endianess of the target, which was previously assumed to be
big-endian for the purpose of getting VSCR. This patch removes this
assumption to fix access to VSCR in little-endian mode.

gdb/ChangeLog:
yyyy-mm-dd  Pedro Franco de Carvalho  <pedromfc@linux.vnet.ibm.com>

	* ppc-linux-tdep.c (ppc_linux_collect_vrregset): New function.
	(ppc_linux_vrregset) : New function.
	(ppc32_le_linux_vrregmap, ppc32_be_linux_vrregmap)
	(ppc32_le_linux_vrregset, ppc32_be_linux_vrregset): New globals.
	(ppc32_linux_vrregset): Remove.
	(ppc_linux_iterate_over_regset_sections): Call ppc_linux_vrregset
	and use result instead of ppc32_linux_vrregset.
	* ppc-linux-tdep.h (ppc_linux_vrregset): New declaration.
	* ppc-linux-nat.c: Include regset.h.
	(gdb_vrregset_t): Adjust comment to account for little-endian
	mode.
	(supply_vrregset, fill_vrregset): Remove.
	(fetch_altivec_register, store_altivec_register): Remove.
	(fetch_altivec_registers): Add regno parameter. Get regset using
	ppc_linux_vrregset. Use regset to supply registers.
	(store_altivec_registers): Add regno parameter. Get regset using
	ppc_linux_vrregset. Use regset to collect registers.
	(fetch_register): Call fetch_altivec_registers instead of
	fetch_altivec_register.
	(store_register): Call store_altivec_registers instead of
	store_altivec_register.
	(fetch_ppc_registers): Call fetch_altivec_registers with -1 for
	the new regno parameter.
	(store_ppc_registers): Call store_altivec_registers with -1 for
	the new regno parameter.

gdb/gdbserver/ChangeLog:
yyyy-mm-dd  Pedro Franco de Carvalho  <pedromfc@linux.vnet.ibm.com>

	* linux-ppc-low.c (ppc_fill_vrregset): Add vscr_offset variable.
	Set vscr_offset to 0 in little-endian mode and 12 in big-endian
	mode. Call collect_register_by_name with vscr using
	vscr_offset. Zero-pad vscr and vrsave fields in collector buffer.
	(ppc_store_vrregset): Add and set vscr_offset variable as in
	ppc_fill_vrregset. Call supply_register_by_name with vscr using
	vscr_offset.
---
 gdb/gdbserver/linux-ppc-low.c |  19 +++++-
 gdb/ppc-linux-nat.c           | 153 +++++++-----------------------------------
 gdb/ppc-linux-tdep.c          |  65 ++++++++++++++++--
 gdb/ppc-linux-tdep.h          |   3 +
 4 files changed, 103 insertions(+), 137 deletions(-)

diff --git a/gdb/gdbserver/linux-ppc-low.c b/gdb/gdbserver/linux-ppc-low.c
index ed48fa7850..91e6625121 100644
--- a/gdb/gdbserver/linux-ppc-low.c
+++ b/gdb/gdbserver/linux-ppc-low.c
@@ -486,12 +486,22 @@ ppc_fill_vrregset (struct regcache *regcache, void *buf)
 {
   int i, base;
   char *regset = (char *) buf;
+  int vscr_offset = 0;
 
   base = find_regno (regcache->tdesc, "vr0");
   for (i = 0; i < 32; i++)
     collect_register (regcache, base + i, &regset[i * 16]);
 
-  collect_register_by_name (regcache, "vscr", &regset[32 * 16 + 12]);
+  if (__BYTE_ORDER == __BIG_ENDIAN)
+    vscr_offset = 12;
+
+  /* Zero-pad the unused bytes in the fields for vscr and vrsave in
+     case they get displayed somewhere.  */
+  memset (&regset[32 * 16], 0, 16);
+  collect_register_by_name (regcache, "vscr",
+			    &regset[32 * 16 + vscr_offset]);
+
+  memset (&regset[33 * 16], 0, 16);
   collect_register_by_name (regcache, "vrsave", &regset[33 * 16]);
 }
 
@@ -500,12 +510,17 @@ ppc_store_vrregset (struct regcache *regcache, const void *buf)
 {
   int i, base;
   const char *regset = (const char *) buf;
+  int vscr_offset = 0;
 
   base = find_regno (regcache->tdesc, "vr0");
   for (i = 0; i < 32; i++)
     supply_register (regcache, base + i, &regset[i * 16]);
 
-  supply_register_by_name (regcache, "vscr", &regset[32 * 16 + 12]);
+  if (__BYTE_ORDER == __BIG_ENDIAN)
+    vscr_offset = 12;
+
+  supply_register_by_name (regcache, "vscr",
+			   &regset[32 * 16 + vscr_offset]);
   supply_register_by_name (regcache, "vrsave", &regset[33 * 16]);
 }
 
diff --git a/gdb/ppc-linux-nat.c b/gdb/ppc-linux-nat.c
index 554aba662e..85cd08cd8e 100644
--- a/gdb/ppc-linux-nat.c
+++ b/gdb/ppc-linux-nat.c
@@ -24,6 +24,7 @@
 #include "gdbthread.h"
 #include "gdbcore.h"
 #include "regcache.h"
+#include "regset.h"
 #include "target.h"
 #include "linux-nat.h"
 #include <sys/types.h>
@@ -160,17 +161,18 @@ struct ppc_hw_breakpoint
    Even though this vrsave register is not included in the regset
    typedef, it is handled by the ptrace requests.
 
-   Note that GNU/Linux doesn't support little endian PPC hardware,
-   therefore the offset at which the real value of the VSCR register
-   is located will be always 12 bytes.
-
    The layout is like this (where x is the actual value of the vscr reg): */
 
 /* *INDENT-OFF* */
 /*
+Big-Endian:
    |.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
    <------->     <-------><-------><->
      VR0           VR31     VSCR    VRSAVE
+Little-Endian:
+   |.|.|.|.|.....|.|.|.|.||X|.|.|.||.|
+   <------->     <-------><-------><->
+     VR0           VR31     VSCR    VRSAVE
 */
 /* *INDENT-ON* */
 
@@ -435,14 +437,13 @@ fetch_vsx_register (struct regcache *regcache, int tid, int regno)
    registers set mechanism, as opposed to the interface for all the
    other registers, that stores/fetches each register individually.  */
 static void
-fetch_altivec_register (struct regcache *regcache, int tid, int regno)
+fetch_altivec_registers (struct regcache *regcache, int tid,
+			 int regno)
 {
   int ret;
-  int offset = 0;
   gdb_vrregset_t regs;
   struct gdbarch *gdbarch = regcache->arch ();
-  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-  int vrregsize = register_size (gdbarch, tdep->ppc_vr0_regnum);
+  const struct regset *vrregset = ppc_linux_vrregset (gdbarch);
 
   ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
   if (ret < 0)
@@ -452,19 +453,11 @@ fetch_altivec_register (struct regcache *regcache, int tid, int regno)
           have_ptrace_getvrregs = 0;
           return;
         }
-      perror_with_name (_("Unable to fetch AltiVec register"));
+      perror_with_name (_("Unable to fetch AltiVec registers"));
     }
- 
-  /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
-     long on the hardware.  We deal only with the lower 4 bytes of the
-     vector.  VRSAVE is at the end of the array in a 4 bytes slot, so
-     there is no need to define an offset for it.  */
-  if (regno == (tdep->ppc_vrsave_regnum - 1))
-    offset = vrregsize - register_size (gdbarch, tdep->ppc_vrsave_regnum);
-  
-  regcache_raw_supply (regcache, regno,
-		       regs + (regno
-			       - tdep->ppc_vr0_regnum) * vrregsize + offset);
+
+  vrregset->supply_regset(vrregset, regcache, regno, &regs,
+			  PPC_LINUX_SIZEOF_VRREGSET);
 }
 
 /* Fetch the top 32 bits of TID's general-purpose registers and the
@@ -559,7 +552,7 @@ fetch_register (struct regcache *regcache, int tid, int regno)
          register.  */
       if (have_ptrace_getvrregs)
        {
-         fetch_altivec_register (regcache, tid, regno);
+         fetch_altivec_registers (regcache, tid, regno);
          return;
        }
      /* If we have discovered that there is no ptrace support for
@@ -647,31 +640,6 @@ supply_vsxregset (struct regcache *regcache, gdb_vsxregset_t *vsxregsetp)
 }
 
 static void
-supply_vrregset (struct regcache *regcache, gdb_vrregset_t *vrregsetp)
-{
-  int i;
-  struct gdbarch *gdbarch = regcache->arch ();
-  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-  int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1;
-  int vrregsize = register_size (gdbarch, tdep->ppc_vr0_regnum);
-  int offset = vrregsize - register_size (gdbarch, tdep->ppc_vrsave_regnum);
-
-  for (i = 0; i < num_of_vrregs; i++)
-    {
-      /* The last 2 registers of this set are only 32 bit long, not
-         128.  However an offset is necessary only for VSCR because it
-         occupies a whole vector, while VRSAVE occupies a full 4 bytes
-         slot.  */
-      if (i == (num_of_vrregs - 2))
-        regcache_raw_supply (regcache, tdep->ppc_vr0_regnum + i,
-			     *vrregsetp + i * vrregsize + offset);
-      else
-        regcache_raw_supply (regcache, tdep->ppc_vr0_regnum + i,
-			     *vrregsetp + i * vrregsize);
-    }
-}
-
-static void
 fetch_vsx_registers (struct regcache *regcache, int tid)
 {
   int ret;
@@ -690,25 +658,6 @@ fetch_vsx_registers (struct regcache *regcache, int tid)
   supply_vsxregset (regcache, &regs);
 }
 
-static void
-fetch_altivec_registers (struct regcache *regcache, int tid)
-{
-  int ret;
-  gdb_vrregset_t regs;
-  
-  ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
-  if (ret < 0)
-    {
-      if (errno == EIO)
-	{
-          have_ptrace_getvrregs = 0;
-	  return;
-	}
-      perror_with_name (_("Unable to fetch AltiVec registers"));
-    }
-  supply_vrregset (regcache, &regs);
-}
-
 /* This function actually issues the request to ptrace, telling
    it to get all general-purpose registers and put them into the
    specified regset.
@@ -847,7 +796,7 @@ fetch_ppc_registers (struct regcache *regcache, int tid)
     fetch_register (regcache, tid, tdep->ppc_fpscr_regnum);
   if (have_ptrace_getvrregs)
     if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
-      fetch_altivec_registers (regcache, tid);
+      fetch_altivec_registers (regcache, tid, -1);
   if (have_ptrace_getsetvsxregs)
     if (tdep->ppc_vsr0_upper_regnum != -1)
       fetch_vsx_registers (regcache, tid);
@@ -898,16 +847,14 @@ store_vsx_register (const struct regcache *regcache, int tid, int regno)
     perror_with_name (_("Unable to store VSX register"));
 }
 
-/* Store one register.  */
 static void
-store_altivec_register (const struct regcache *regcache, int tid, int regno)
+store_altivec_registers (const struct regcache *regcache, int tid,
+			 int regno)
 {
   int ret;
-  int offset = 0;
   gdb_vrregset_t regs;
   struct gdbarch *gdbarch = regcache->arch ();
-  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-  int vrregsize = register_size (gdbarch, tdep->ppc_vr0_regnum);
+  const struct regset *vrregset = ppc_linux_vrregset (gdbarch);
 
   ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
   if (ret < 0)
@@ -917,21 +864,15 @@ store_altivec_register (const struct regcache *regcache, int tid, int regno)
           have_ptrace_getvrregs = 0;
           return;
         }
-      perror_with_name (_("Unable to fetch AltiVec register"));
+      perror_with_name (_("Unable to fetch AltiVec registers"));
     }
 
-  /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
-     long on the hardware.  */
-  if (regno == (tdep->ppc_vrsave_regnum - 1))
-    offset = vrregsize - register_size (gdbarch, tdep->ppc_vrsave_regnum);
-
-  regcache_raw_collect (regcache, regno,
-			regs + (regno
-				- tdep->ppc_vr0_regnum) * vrregsize + offset);
+  vrregset->collect_regset (vrregset, regcache, regno, &regs,
+			    PPC_LINUX_SIZEOF_VRREGSET);
 
   ret = ptrace (PTRACE_SETVRREGS, tid, 0, &regs);
   if (ret < 0)
-    perror_with_name (_("Unable to store AltiVec register"));
+    perror_with_name (_("Unable to store AltiVec registers"));
 }
 
 /* Assuming TID referrs to an SPE process, set the top halves of TID's
@@ -1034,7 +975,7 @@ store_register (const struct regcache *regcache, int tid, int regno)
 
   if (altivec_register_p (gdbarch, regno))
     {
-      store_altivec_register (regcache, tid, regno);
+      store_altivec_registers (regcache, tid, regno);
       return;
     }
   if (vsx_register_p (gdbarch, regno))
@@ -1111,29 +1052,6 @@ fill_vsxregset (const struct regcache *regcache, gdb_vsxregset_t *vsxregsetp)
 }
 
 static void
-fill_vrregset (const struct regcache *regcache, gdb_vrregset_t *vrregsetp)
-{
-  int i;
-  struct gdbarch *gdbarch = regcache->arch ();
-  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-  int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1;
-  int vrregsize = register_size (gdbarch, tdep->ppc_vr0_regnum);
-  int offset = vrregsize - register_size (gdbarch, tdep->ppc_vrsave_regnum);
-
-  for (i = 0; i < num_of_vrregs; i++)
-    {
-      /* The last 2 registers of this set are only 32 bit long, not
-         128, but only VSCR is fetched as a 16 bytes quantity.  */
-      if (i == (num_of_vrregs - 2))
-        regcache_raw_collect (regcache, tdep->ppc_vr0_regnum + i,
-			      *vrregsetp + i * vrregsize + offset);
-      else
-        regcache_raw_collect (regcache, tdep->ppc_vr0_regnum + i,
-			      *vrregsetp + i * vrregsize);
-    }
-}
-
-static void
 store_vsx_registers (const struct regcache *regcache, int tid)
 {
   int ret;
@@ -1156,29 +1074,6 @@ store_vsx_registers (const struct regcache *regcache, int tid)
     perror_with_name (_("Couldn't write VSX registers"));
 }
 
-static void
-store_altivec_registers (const struct regcache *regcache, int tid)
-{
-  int ret;
-  gdb_vrregset_t regs;
-
-  ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
-  if (ret < 0)
-    {
-      if (errno == EIO)
-        {
-          have_ptrace_getvrregs = 0;
-          return;
-        }
-      perror_with_name (_("Couldn't get AltiVec registers"));
-    }
-
-  fill_vrregset (regcache, &regs);
-  
-  if (ptrace (PTRACE_SETVRREGS, tid, 0, &regs) < 0)
-    perror_with_name (_("Couldn't write AltiVec registers"));
-}
-
 /* This function actually issues the request to ptrace, telling
    it to store all general-purpose registers present in the specified
    regset.
@@ -1337,7 +1232,7 @@ store_ppc_registers (const struct regcache *regcache, int tid)
     }
   if (have_ptrace_getvrregs)
     if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
-      store_altivec_registers (regcache, tid);
+      store_altivec_registers (regcache, tid, -1);
   if (have_ptrace_getsetvsxregs)
     if (tdep->ppc_vsr0_upper_regnum != -1)
       store_vsx_registers (regcache, tid);
diff --git a/gdb/ppc-linux-tdep.c b/gdb/ppc-linux-tdep.c
index 344069d752..3c8ba26f8e 100644
--- a/gdb/ppc-linux-tdep.c
+++ b/gdb/ppc-linux-tdep.c
@@ -444,6 +444,24 @@ ppc_linux_collect_gregset (const struct regset *regset,
     }
 }
 
+static void
+ppc_linux_collect_vrregset (const struct regset *regset,
+			    const struct regcache *regcache,
+			    int regnum, void *buf, size_t len)
+{
+  gdb_byte *vrregs = (gdb_byte *) buf;
+
+  /* Zero-pad the unused bytes in the fields for vscr and vrsave
+     in case they get displayed somewhere (e.g. in core files).  */
+  if (regnum == PPC_VSCR_REGNUM || regnum == -1)
+    memset (&vrregs[32 * 16], 0, 16);
+
+  if (regnum == PPC_VRSAVE_REGNUM || regnum == -1)
+    memset (&vrregs[33 * 16], 0, 16);
+
+  regcache_collect_regset (regset, regcache, regnum, buf, len);
+}
+
 /* Regset descriptions.  */
 static const struct ppc_reg_offsets ppc32_linux_reg_offsets =
   {
@@ -513,10 +531,33 @@ static const struct regset ppc32_linux_fpregset = {
   ppc_collect_fpregset
 };
 
-static const struct regset ppc32_linux_vrregset = {
-  &ppc32_linux_reg_offsets,
-  ppc_supply_vrregset,
-  ppc_collect_vrregset
+static const struct regcache_map_entry ppc32_le_linux_vrregmap[] =
+  {
+      { 32, PPC_VR0_REGNUM, 16 },
+      { 1, PPC_VSCR_REGNUM, 16 },
+      { 1, PPC_VRSAVE_REGNUM, 16 },
+      { 0 }
+  };
+
+static const struct regcache_map_entry ppc32_be_linux_vrregmap[] =
+  {
+      { 32, PPC_VR0_REGNUM, 16 },
+      { 1, REGCACHE_MAP_SKIP, 12},
+      { 1, PPC_VSCR_REGNUM, 4 },
+      { 1, PPC_VRSAVE_REGNUM, 16 },
+      { 0 }
+  };
+
+static const struct regset ppc32_le_linux_vrregset = {
+  ppc32_le_linux_vrregmap,
+  regcache_supply_regset,
+  ppc_linux_collect_vrregset
+};
+
+static const struct regset ppc32_be_linux_vrregset = {
+  ppc32_be_linux_vrregmap,
+  regcache_supply_regset,
+  ppc_linux_collect_vrregset
 };
 
 static const struct regset ppc32_linux_vsxregset = {
@@ -537,6 +578,15 @@ ppc_linux_fpregset (void)
   return &ppc32_linux_fpregset;
 }
 
+const struct regset *
+ppc_linux_vrregset (struct gdbarch *gdbarch)
+{
+  if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
+    return &ppc32_be_linux_vrregset;
+  else
+    return &ppc32_le_linux_vrregset;
+}
+
 /* Iterate over supported core file register note sections. */
 
 static void
@@ -557,8 +607,11 @@ ppc_linux_iterate_over_regset_sections (struct gdbarch *gdbarch,
   cb (".reg2", 264, &ppc32_linux_fpregset, NULL, cb_data);
 
   if (have_altivec)
-    cb (".reg-ppc-vmx", PPC_LINUX_SIZEOF_VRREGSET, &ppc32_linux_vrregset,
-	"ppc Altivec", cb_data);
+    {
+      const struct regset *vrregset = ppc_linux_vrregset(gdbarch);
+      cb (".reg-ppc-vmx", PPC_LINUX_SIZEOF_VRREGSET, vrregset,
+	  "ppc Altivec", cb_data);
+    }
 
   if (have_vsx)
     cb (".reg-ppc-vsx", PPC_LINUX_SIZEOF_VSXREGSET,
diff --git a/gdb/ppc-linux-tdep.h b/gdb/ppc-linux-tdep.h
index 5e7c4be16b..a8715bd418 100644
--- a/gdb/ppc-linux-tdep.h
+++ b/gdb/ppc-linux-tdep.h
@@ -28,6 +28,9 @@ struct regset;
 const struct regset *ppc_linux_gregset (int);
 const struct regset *ppc_linux_fpregset (void);
 
+/* Get the vector regset that matches the target byte order.  */
+const struct regset *ppc_linux_vrregset (struct gdbarch *gdbarch);
+
 /* Extra register number constants.  The Linux kernel stores a
    "trap" code and the original value of r3 into special "registers";
    these need to be saved and restored when performing an inferior
-- 
2.13.6


  parent reply	other threads:[~2018-05-10 21:18 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-10 19:59 [PATCH 0/8] [PowerPC] Miscellaneous fixes for register access Pedro Franco de Carvalho
2018-05-10 19:59 ` [PATCH 3/8] [PowerPC] Disable regsets using zero sizes in gdbserver Pedro Franco de Carvalho
2018-05-16 16:17   ` Ulrich Weigand
2018-05-10 19:59 ` [PATCH 4/8] [PowerPC] Consolidate linux vector regset sizes Pedro Franco de Carvalho
2018-05-16 16:35   ` Ulrich Weigand
2018-05-10 19:59 ` [PATCH 1/8] [PowerPC] Consolidate linux target description selection Pedro Franco de Carvalho
2018-05-16 14:05   ` Ulrich Weigand
2018-05-16 22:50     ` Pedro Franco de Carvalho
2018-05-17  8:28       ` Ulrich Weigand
2018-05-10 20:00 ` [PATCH 8/8] [PowerPC] Recognize isa205 in linux core files Pedro Franco de Carvalho
2018-05-16 15:53   ` Ulrich Weigand
2018-05-16 23:32     ` Pedro Franco de Carvalho
2018-05-17 10:22       ` Ulrich Weigand
2018-05-21 20:46         ` Pedro Franco de Carvalho
2018-05-22 12:48           ` Ulrich Weigand
2018-05-22 14:33             ` Pedro Franco de Carvalho
2018-05-10 20:33 ` [PATCH 6/8] [PowerPC] Fix VSX registers " Pedro Franco de Carvalho
2018-05-16 14:18   ` Ulrich Weigand
2018-05-10 20:33 ` [PATCH 2/8] [PowerPC] Consolidate wordsize getter between native and gdbserver Pedro Franco de Carvalho
2018-05-16 15:54   ` Ulrich Weigand
2018-05-10 21:46 ` Pedro Franco de Carvalho [this message]
2018-05-16 14:06   ` [PATCH 5/8] [PowerPC] Fix access to VSCR in linux targets Ulrich Weigand
2018-05-17 21:25     ` Pedro Franco de Carvalho
2018-05-18 15:37       ` Ulrich Weigand
2018-05-21 20:46     ` Pedro Franco de Carvalho
2018-05-22 12:56       ` Ulrich Weigand
2018-05-10 22:25 ` [PATCH 7/8] [PowerPC] Fix inclusion of dfp pseudoregs in tdep Pedro Franco de Carvalho
2018-05-16 14:18   ` Ulrich Weigand
2018-05-21 20:46 ` [PATCH v2 1/8] [PowerPC] Consolidate linux target description selection Pedro Franco de Carvalho
2018-05-21 20:46   ` [PATCH v2 4/8] [PowerPC] Consolidate linux vector regset sizes Pedro Franco de Carvalho
2018-05-22 12:48     ` Ulrich Weigand
2018-05-21 20:46   ` [PATCH v2 2/8] [PowerPC] Consolidate wordsize getter between native and gdbserver Pedro Franco de Carvalho
2018-05-22 12:56     ` Ulrich Weigand
2018-05-21 20:46   ` [PATCH v2 3/8] [PowerPC] Disable regsets using zero sizes in gdbserver Pedro Franco de Carvalho
2018-05-22 12:48     ` Ulrich Weigand
2018-05-21 23:45   ` [PATCH v2 5/8] [PowerPC] Fix access to VSCR in linux targets Pedro Franco de Carvalho
2018-05-22 12:56     ` Ulrich Weigand
2018-05-21 23:55   ` [PATCH v2 8/8] [PowerPC] Recognize isa205 in linux core files Pedro Franco de Carvalho
2018-05-22 13:34     ` Ulrich Weigand
2018-05-21 23:56   ` [PATCH v2 7/8] [PowerPC] Fix inclusion of dfp pseudoregs in tdep Pedro Franco de Carvalho
2018-05-22 12:56     ` Ulrich Weigand
2018-05-22  0:54   ` [PATCH v2 6/8] [PowerPC] Fix VSX registers in linux core files Pedro Franco de Carvalho
2018-05-22 13:46     ` Ulrich Weigand
2018-05-22 12:48   ` [PATCH v2 1/8] [PowerPC] Consolidate linux target description selection Ulrich Weigand

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180510195840.17734-6-pedromfc@linux.vnet.ibm.com \
    --to=pedromfc@linux.vnet.ibm.com \
    --cc=gdb-patches@sourceware.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox