From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 59665 invoked by alias); 25 Apr 2018 08:04:41 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 59646 invoked by uid 89); 25 Apr 2018 08:04:39 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 spammy=H*RU:209.85.128.194, Hx-spam-relays-external:209.85.128.194 X-HELO: mail-wr0-f194.google.com Received: from mail-wr0-f194.google.com (HELO mail-wr0-f194.google.com) (209.85.128.194) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 25 Apr 2018 08:04:37 +0000 Received: by mail-wr0-f194.google.com with SMTP id d1-v6so52324551wrj.13 for ; Wed, 25 Apr 2018 01:04:37 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=xiRUivpkFA2kWQ8SYeeiYIsfflVY94tQarUU7aiYx3Q=; b=V86N2Sc+KlNnKDtA0lZS5fB3bSuqOSaBM9tQZIWcNlhmwOpouAB1AxLIBZHFK2FNAs tDXRRn+mvj1VgBuJdmfNMQrqyAkIba53lHXNohDUbMv3XlqbmEZLZykiWAPstxRU6YQ5 /XrpnmPinF0yUUw7z6ymPLKF73we7M+nqCHbyvqFWctqOeGFaiaVPsZX96pKNqDPBPvC SW4aHP4K+u4lwuoHVtqitMb3Bhh0Ns8P8zRFoixGjNO5jhzymD9GslUUfGKRc/Z0o3Nq /ATS4ETqOThqMU19hQ9Hdr723UudnzaBQ8fvLYGKeqc3ptrWaclhKszKLVY8YCYVP/St OBgg== X-Gm-Message-State: ALQs6tAEIgKXv8BcPDRBnV+XJDqgUDmWu7jUfP5YHJH6QquOHvdnW6AR fkdIJcGGu/A2GodVAYOluwIM8Q== X-Google-Smtp-Source: AIpwx4/ajL2fxQvx7hVP/GvMEe/KDJEe6Pso+Q3mGBpqCTeTL86rst9Gk+a61DSjTHiQ6Ce9w2YsFA== X-Received: by 2002:adf:b2f5:: with SMTP id g108-v6mr23208774wrd.147.1524643475558; Wed, 25 Apr 2018 01:04:35 -0700 (PDT) Received: from holly.lan (cpc141214-aztw34-2-0-cust773.18-1.cable.virginm.net. [86.9.19.6]) by smtp.gmail.com with ESMTPSA id 39-v6sm26095702wry.89.2018.04.25.01.04.34 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 25 Apr 2018 01:04:34 -0700 (PDT) Date: Wed, 25 Apr 2018 08:04:00 -0000 From: Daniel Thompson To: Omair Javaid Cc: Pedro Alves , Yao Qi , GDB Patches Subject: Re: [PATCH 0/3 v3] [AArch64] Support tagged pointer Message-ID: <20180425080432.kv4gagdcz7mhmx4x@holly.lan> References: <5e21c13b-9261-f947-e06c-dad9568278bf@redhat.com> <061e956c-72a7-2c2e-512b-3dfe42881818@redhat.com> <56373ed6-3a63-4508-61fa-54a3a456d785@redhat.com> <3f62b4ea-1f80-5faa-f372-b83b3e5de448@redhat.com> <20180424160538.kxvorrhvku4ukpj6@holly.lan> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20180323 X-IsSubscribed: yes X-SW-Source: 2018-04/txt/msg00500.txt.bz2 On Wed, Apr 25, 2018 at 04:41:40AM +0500, Omair Javaid wrote: > >> If everyone agrees that proper Linux kernel support benefits from > >> its own osabi setting/name, then I don't see why we couldn't start by > >> adding the osabi setting as soon as we have a use for it, even if > >> the larger Linux Kernel patches aren't ready yet. > > > > Following on from the above, for aarch64-linux-tdep we can apply domain > > knowledge regarding how things are configured. Here we know that TTBR0 > > is guaranteed to have top byte ignore set, TTBR1 does not *and* we > > also know (from memory-layout.txt) that TTBR0 is sufficiently small > > that bit 55 can be used to discriminate between the two cases. > > > > In others words regardless of whether we are running at EL0 or EL1 then > > I think we should mask the top byte from pointers if and only if bit 55 > > is unset, otherwise leave them as they are. > > What I am understanding here is that you are basing your decision on > the fact that: > > "User addresses have bits 63:48 set to 0 while the kernel addresses have > the same bits set to 1. TTBRx selection is given by bit 63 of the > virtual address." > > Sounds legitimate for now but are we ever going to use more than > 48-bit virtual addresses in arm64 linux? Almost guaranteed I would have thought! However since the suggestion is *not* based on the assumption that bits 63:48 are zero then I don't think this matters. It is based on the assumption that bits 63:56 are unknown and cannot be used for decision making (because tag 0xff is not reserved) and also that bit 55 is not part of the VA. Bits 54:48 are not involved at all. For 52-bit VAs (and any other number of bits <56) the hueristic remains correct. For 56-bit VAs the pointer tagging feature cannot survive without being changed because with bit 55 allocated there would be no way for the hardware to discriminate between TTBR0 and TTBR1 pointers either. Thus whilst I don't deny the possibility that 56-bit addresses may eventually happen, *any* implementation of pointer tagging support in gdb would need to be updated at that point anyway. Daniel.