Re: [PATCH] Patch 2 of 2 for aarch64 ILP32 support in gdb

[Yao Qi <qiyaoltc@gmail.com>]

On 17-01-27 14:25:39, Steve Ellcey wrote:
> That patch seems reasonable and it fixed some test failures I had
> in the glibc testsuite but it is breaking gdb.????If I undo this
> patch by making this change to bfd/cpu-aarch64.c:
> 
> ??static const bfd_arch_info_type bfd_aarch64_arch_ilp32 =
> -????N (bfd_mach_aarch64_ilp32, "aarch64:ilp32", 32, FALSE, NULL);
> +????N (bfd_mach_aarch64_ilp32, "aarch64:ilp32", 64, FALSE, NULL);
>

This changes the word size and address size, which is used to determine
the inferior is arm or aarch64 by checking "bits_per_word == 32" in
multi-arch debugging.  You can find some instances of such check in
aarch64-linux-nat.c.  If the bits_per_word is 32 in ILP32, GDB thinks
the inferior is an ARM one, rather than an AArch64 ILP32 one. which is
wrong.  We need to tweak the condition above to correctly identify the
ARM inferior.

> Then gdb starts working again and I can debug 32 bit programs.
> 
> I am not sure how this change to the ILP32 aarch64 bfd description
> is affecting gdb and why this change would break things.????Do you
> know why this change messes up gdb?
> 

D0 you compare the ILP32 gdb test result with normal aarch64 one?

> +
>  /* Return the pseudo register name corresponding to register regnum.  */
>  
>  static const char *
> @@ -2851,6 +2867,10 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
>    const struct tdesc_feature *feature;
>    int num_regs = 0;
>    int num_pseudo_regs = 0;
> +  bool ilp32 = FALSE;
> +

s/FALSE/false/

> +  if (info.bfd_arch_info->mach == bfd_mach_aarch64_ilp32)
> +    ilp32 = TRUE;

s/TRUE/true/

-- 
Yao