From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 25926 invoked by alias); 25 Jan 2017 22:42:49 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 25906 invoked by uid 89); 25 Jan 2017 22:42:48 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.4 required=5.0 tests=BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,RCVD_IN_SORBS_SPAM,SPF_PASS autolearn=no version=3.3.2 spammy=Hx-spam-relays-external:74.125.82.68, H*RU:74.125.82.68 X-HELO: mail-wm0-f68.google.com Received: from mail-wm0-f68.google.com (HELO mail-wm0-f68.google.com) (74.125.82.68) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 25 Jan 2017 22:42:46 +0000 Received: by mail-wm0-f68.google.com with SMTP id c85so45814864wmi.1 for ; Wed, 25 Jan 2017 14:42:46 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=1snWd6dYN8MSNCqMvYJsEspyPfVK2Wy3SJm8sYNc4Jk=; b=ZyR8zyiD8HDUMeHOghbQF5Lbn+dYy8U4RcBTHFGOAyUY2eTGCesCV9SvACYZwvgcHI P624bJ7Lr7R2L1WzZ6Apk1JqeSpGBjRNtlNo0hkQH/7m8WJxpO782lRy9vYa/ENduNIZ 39m4qBZ6WHKg7Mrerhfy9snn3a+6lfkS+kT/aP4oKI+iqib80o7F840EnHiaDIPAnX1W 9YDHvEFqf1AUHZe5pag7wBeIhN0XXUUoKHZwyHO+uPjvOh9lWjyjcz0Zu5+L47hUcYtt MtQgB74kFl2x3ZxyK3/0+Ev6wDkpYNjODJJfEHo5IO2cRn3gLLN+2SXWszTOqcB4/Ti4 VLew== X-Gm-Message-State: AIkVDXJ8Svo+oZ5tsaQ/BL20iOCnKR14vASXghN/v2HnH+AoOOPRcsqDLihNC4jw/k8BmQ== X-Received: by 10.28.217.83 with SMTP id q80mr23104988wmg.58.1485384164729; Wed, 25 Jan 2017 14:42:44 -0800 (PST) Received: from localhost ([2a02:c7d:8e80:c00:f496:8109:4db6:9490]) by smtp.gmail.com with ESMTPSA id 61sm27012485wrs.29.2017.01.25.14.42.43 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 25 Jan 2017 14:42:44 -0800 (PST) Date: Wed, 25 Jan 2017 22:42:00 -0000 From: Yao Qi To: Ivo Raisr Cc: gdb-patches@sourceware.org Subject: Re: [PATCH] Bug 20936 - provide sparc and sparcv9 target description XML files Message-ID: <20170125224241.twkvdrqzlfe6s7fe@localhost> References: <46200a1e-29f7-8e20-c0b5-3f6f25c82d45@oracle.com> <20161206152616.GC28789@E107787-LIN> <83d4c58d-0834-4fc2-6194-72408510aa8a@oracle.com> <20161212125331.GB25542@E107787-LIN> <6cfe328e-9928-5060-a5ab-e984219e1c81@oracle.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <6cfe328e-9928-5060-a5ab-e984219e1c81@oracle.com> User-Agent: NeoMutt/20161104 (1.7.1) X-IsSubscribed: yes X-SW-Source: 2017-01/txt/msg00558.txt.bz2 On 17-01-17 22:37:59, Ivo Raisr wrote: > diff -Nupr a/gdb/doc/gdb.texinfo gdb-7.11/gdb/doc/gdb.texinfo > --- a/gdb/doc/gdb.texinfo 2016-02-24 01:55:15.000000000 +0000 > +++ gdb-7.11/gdb/doc/gdb.texinfo 2017-01-17 04:51:21.533190029 +0000 > @@ -40658,6 +40658,7 @@ registers using the capitalization used > * Nios II Features:: > * PowerPC Features:: > * S/390 and System z Features:: > +* Sparc Features:: > * TIC6x Features:: > @end menu > > @@ -40945,6 +40946,48 @@ through @samp{f15} to present the 128-bi > contain the 128-bit wide vector registers @samp{v16} through > @samp{v31}. > > +@node Sparc Features > +@subsection Sparc Features > +@cindex target descriptions, sparc32 features > +@cindex target descriptions, sparc64 features > +The @samp{org.gnu.gdb.sparc.cpu} feature is required for sparc32/sparc64 > +targets. It should describe the following registers: > + > +@itemize @minus > +@item > +@samp{g0} through @samp{g7} > +@item > +@samp{o0} through @samp{o7} > +@item > +@samp{l0} through @samp{l7} > +@item > +@samp{i0} through @samp{i7} > +@end itemize > + > +They may be 32-bit or 64-bit depending on the target. > + > +Also the @samp{org.gnu.gdb.sparc.fpu} feature is required for sparc32/sparc64 > +targets. It should describe the following registers: > + > +@itemize @minus > +@item > +@samp{f0} through @samp{f31} > +@item > +@samp{f32} through @samp{f62} for sparc64 > +@end itemize > + > +The @samp{org.gnu.gdb.sparc.cp0} feature is required for sparc32/sparc64 > +targets. It should describe the following registers: > + > +@itemize @minus > +@item > +@samp{y}, @samp{psr}, @samp{wim}, @samp{tbr}, @samp{pc}, @samp{npc}, > +@samp{fsr}, and @samp{csr} for sparc32 > +@item > +@samp{pc}, @samp{npc}, @samp{state}, @samp{fsr}, @samp{fprs}, and @samp{y} > +for sparc64 > +@end itemize > + > @node TIC6x Features > @subsection TMS320C6x Features > @cindex target descriptions, TIC6x features If the doc hasn't been reviewed before, it needs a doc review. > diff -Nupr a/gdb/features/sparc/sparc32-cp0.xml gdb-7.11/gdb/features/sparc/sparc32-cp0.xml > --- a/gdb/features/sparc/sparc32-cp0.xml 1969-12-31 16:00:00.000000000 +0000 > +++ gdb-7.11/gdb/features/sparc/sparc32-cp0.xml 2017-01-17 04:51:21.534235184 +0000 > @@ -0,0 +1,19 @@ > + > + > + non-doc bits of this patch look good to me. -- Yao