[patch, avr, pr19401] Update PC after break

[Pitchumani Sivanupandi <pitchumani.s@atmel.com>]

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avr-gdb doesn't seem to be rewinding the PC after break. If a breakpoint
is at four byte instruction, it resumes from the middle of the
instruction. This caused the target to reject the next (half) instruction
as illegal. In case of breakpoint at two byte instruction, it resumes from
the the next instruction. Instruction at breakpoint location was skipped
as the PC was rewinded after break.

Test case in PR19401 is the example for the first situation. Below
example is for second situation.

volatile int a = 12;

int main ()
{
  a = 23;
  while (1)
    a++;

  return 0;
}

command line: avr-gcc test.c -mmcu=atmega2560 -g -o test.elf
avr-gdb test.elf
(gdb) target sim
(gdb) load
(gdb) b main
(gdb) run
0x00000124 in main () at sim1.c:5
5         a = 0x0123;
(gdb) disassemble
Dump of assembler code for function main:
   0x0000011a <+0>:     push    r28
   0x0000011c <+2>:     push    r29
   0x0000011e <+4>:     in      r28, 0x3d       ; 61
   0x00000120 <+6>:     in      r29, 0x3e       ; 62
   0x00000122 <+8>:     ldi     r24, 0x23       ; 35
=> 0x00000124 <+10>:    ldi     r25, 0x01       ; 1
   0x00000126 <+12>:    sts     0x0201, r25
   0x0000012a <+16>:    sts     0x0200, r24
   0x0000012e <+20>:    lds     r24, 0x0200
   0x00000132 <+24>:    lds     r25, 0x0201
   0x00000136 <+28>:    adiw    r24, 0x01       ; 1
   0x00000138 <+30>:    sts     0x0201, r25
   0x0000013c <+34>:    sts     0x0200, r24
   0x00000140 <+38>:    rjmp    .-20            ;  0x12e <main+20>
End of assembler dump.
(gdb) si
0x00000126      5         a = 0x0123;
(gdb) p $r24
$1 = 0
(gdb) p $r25
$2 = 1
--
Register r24 should have value 0x23.

Attached patch decrements the PC after break so that target can execute the
instruction at breakpoint location.

No regressions found when tested with the simulator.

If ok, could someone commit please? I do not have commit access.

Regards,
Pitchumani

gdb/ChangeLog

2016-03-23  Pitchumani Sivanupandi  <pitchumani.s@atmel.com>

    * avr-tdep.c (avr_break_insn): Define.
    (avr_breakpoint_from_pc): Remove avr_break_insn define.
    (avr_gdbarch_init): Set decr_pc_after_break hook with the size of
    the break instruction.

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diff --git a/gdb/avr-tdep.c b/gdb/avr-tdep.c
index 088fe51..be53db2 100644
--- a/gdb/avr-tdep.c
+++ b/gdb/avr-tdep.c
@@ -236,6 +236,8 @@ avr_register_type (struct gdbarch *gdbarch, int
reg_nr)
   return builtin_type (gdbarch)->builtin_uint8;
 }

+static const unsigned char avr_break_insn [] = { 0x98, 0x95 };
+
 /* Instruction address checks and convertions.  */

 static CORE_ADDR
@@ -916,7 +918,6 @@ static const unsigned char *
 avr_breakpoint_from_pc (struct gdbarch *gdbarch,
                        CORE_ADDR *pcptr, int *lenptr)
 {
-    static const unsigned char avr_break_insn [] = { 0x98, 0x95 };
     *lenptr = sizeof (avr_break_insn);
     return avr_break_insn;
 }
@@ -1518,6 +1519,7 @@ avr_gdbarch_init (struct gdbarch_info info, struct
gdbarch_list *arches)
   set_gdbarch_inner_than (gdbarch, core_addr_lessthan);

   set_gdbarch_breakpoint_from_pc (gdbarch, avr_breakpoint_from_pc);
+  set_gdbarch_decr_pc_after_break (gdbarch, sizeof (avr_break_insn));

   frame_unwind_append_unwinder (gdbarch, &avr_frame_unwind);
   frame_base_set_default (gdbarch, &avr_frame_base);