From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 25901 invoked by alias); 6 Dec 2015 16:35:32 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 25891 invoked by uid 89); 6 Dec 2015 16:35:31 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.9 required=5.0 tests=AWL,BAYES_05,KAM_LAZY_DOMAIN_SECURITY,RCVD_IN_DNSWL_LOW autolearn=no version=3.3.2 X-HELO: rock.gnat.com Received: from rock.gnat.com (HELO rock.gnat.com) (205.232.38.15) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Sun, 06 Dec 2015 16:35:30 +0000 Received: from localhost (localhost.localdomain [127.0.0.1]) by filtered-rock.gnat.com (Postfix) with ESMTP id CA7DF116551; Sun, 6 Dec 2015 11:35:28 -0500 (EST) Received: from rock.gnat.com ([127.0.0.1]) by localhost (rock.gnat.com [127.0.0.1]) (amavisd-new, port 10024) with LMTP id xYCGf9zeIYCO; Sun, 6 Dec 2015 11:35:28 -0500 (EST) Received: from joel.gnat.com (localhost.localdomain [127.0.0.1]) by rock.gnat.com (Postfix) with ESMTP id A38B111654C; Sun, 6 Dec 2015 11:35:28 -0500 (EST) Received: by joel.gnat.com (Postfix, from userid 1000) id 2B3B1445B6; Sun, 6 Dec 2015 17:35:27 +0100 (CET) Date: Sun, 06 Dec 2015 16:35:00 -0000 From: Joel Brobecker To: Walfred Tedeschi Cc: gdb-patches@sourceware.org Subject: Re: [PATCH v1] Intel(R) MPX registers to the DWARF enumeration. Message-ID: <20151206163527.GA4819@adacore.com> References: <1445864086-4831-1-git-send-email-walfred.tedeschi@intel.com> <1445864086-4831-5-git-send-email-walfred.tedeschi@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1445864086-4831-5-git-send-email-walfred.tedeschi@intel.com> User-Agent: Mutt/1.5.23 (2014-03-12) X-SW-Source: 2015-12/txt/msg00119.txt.bz2 > Add registers as defined in the ABI adapted for MPX. > As presented at: > https://github.com/hjl-tools/x86-psABI/wiki/X86-psABI > > 2013-05-06 Walfred Tedeschi > > * amd64-tdep.c (amd64_dwarf_regmap): Add mpx registers. > * amd64-tdep.h (amd64_regnum): Add mpx registers. Small nit: should we spell "MPX"? BTW - the ABI document reference above seem to only indicate registers 126-129 as "reserved" rather than bound registers 0-4. Is that normal? > --- > gdb/amd64-tdep.c | 12 +++++++++++- > gdb/amd64-tdep.h | 3 ++- > 2 files changed, 13 insertions(+), 2 deletions(-) > > diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c > index f0720c8..0fa4d54 100644 > --- a/gdb/amd64-tdep.c > +++ b/gdb/amd64-tdep.c > @@ -233,7 +233,17 @@ static int amd64_dwarf_regmap[] = > /* Floating Point Control Registers. */ > AMD64_MXCSR_REGNUM, > AMD64_FCTRL_REGNUM, > - AMD64_FSTAT_REGNUM > + AMD64_FSTAT_REGNUM, > + -1, -1, -1, -1, /* 67 ... 70. */ > + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* 70 ... 80. */ > + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* 80 ... 90. */ > + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* 90 ... 100. */ > + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* 100 ... 110. */ > + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* 110 ... 120. */ > + -1, -1, -1, -1, -1, /*120 ... 125. */ > + > + AMD64_BND0R_REGNUM, AMD64_BND0R_REGNUM + 1, > + AMD64_BND0R_REGNUM + 2, AMD64_BND0R_REGNUM + 3 I'll admit this is a bit of a nitpicking, but I think it would be useful to continue doing what we've been doing before, which is document what the various range of register numbers are for. And let's try to have them organized in banks of 8, rather than 10. Eg: /* MMX Registers 16 - 31 (67 - 82). */ -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* Reserved (83 - 117). */ -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* Vector Mask Register 0 - 7 (118 - 125). */ -1, -1, -1, -1, -1, -1, -1, -1, /* Bound Registers 0 - 3 (126 - 129). */ AMD64_BND0R_REGNUM, AMD64_BND0R_REGNUM + 1, AMD64_BND0R_REGNUM + 2, AMD64_BND0R_REGNUM + 3, (note that I added a comma at the end of the last register; that way, if we add more later on, we don't have to modify that line of code) > }; > > static const int amd64_dwarf_regmap_len = > diff --git a/gdb/amd64-tdep.h b/gdb/amd64-tdep.h > index 704225e..76a89b9 100644 > --- a/gdb/amd64-tdep.h > +++ b/gdb/amd64-tdep.h > @@ -66,7 +66,8 @@ enum amd64_regnum > AMD64_YMM0H_REGNUM, /* %ymm0h */ > AMD64_YMM15H_REGNUM = AMD64_YMM0H_REGNUM + 15, > AMD64_BND0R_REGNUM = AMD64_YMM15H_REGNUM + 1, > - AMD64_BND3R_REGNUM = AMD64_BND0R_REGNUM + 3, > + AMD64_BND1R_REGNUM, AMD64_BND2R_REGNUM, > + AMD64_BND3R_REGNUM, > AMD64_BNDCFGU_REGNUM, > AMD64_BNDSTATUS_REGNUM, > AMD64_XMM16_REGNUM, > -- > 2.1.4 -- Joel