From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 71625 invoked by alias); 18 Sep 2015 12:26:05 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 71608 invoked by uid 89); 18 Sep 2015 12:26:05 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-3.2 required=5.0 tests=AWL,BAYES_00,KAM_LAZY_DOMAIN_SECURITY,SPF_HELO_PASS,T_RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Fri, 18 Sep 2015 12:26:04 +0000 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) by mx1.redhat.com (Postfix) with ESMTPS id 60E3E8EA2F for ; Fri, 18 Sep 2015 12:26:03 +0000 (UTC) Received: from pinnacle.lan (ovpn-113-104.phx2.redhat.com [10.3.113.104]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id t8ICQ22i019553 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA256 bits=256 verify=NO) for ; Fri, 18 Sep 2015 08:26:03 -0400 Date: Fri, 18 Sep 2015 12:26:00 -0000 From: Kevin Buettner To: gdb-patches@sourceware.org Subject: Re: [PATCH 2/8] Add new gdbarch method, unconditional_branch_address Message-ID: <20150918052601.69e7754c@pinnacle.lan> In-Reply-To: <20150918120606.GC10919@embecosm.com> References: <20150818235334.1afb0c85@pinnacle.lan> <20150819000002.06f6a2cf@pinnacle.lan> <20150918120157.GB10919@embecosm.com> <20150918120606.GC10919@embecosm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-IsSubscribed: yes X-SW-Source: 2015-09/txt/msg00458.txt.bz2 On Fri, 18 Sep 2015 13:06:06 +0100 Andrew Burgess wrote: > * Andrew Burgess [2015-09-18 13:01:57 +0100]: > > > * Kevin Buettner [2015-08-19 00:00:02 -0700]: > > > > > diff --git a/gdb/gdbarch.h b/gdb/gdbarch.h > > > index c1e2c1a..1770960 100644 > > > --- a/gdb/gdbarch.h > > > +++ b/gdb/gdbarch.h > > > @@ -924,7 +924,7 @@ extern void set_gdbarch_max_insn_length (struct gdbarch *gdbarch, ULONGEST max_i > > > If your architecture doesn't need to adjust instructions before > > > single-stepping them, consider using simple_displaced_step_copy_insn > > > here. > > > - > > > + > > > If the instruction cannot execute out of line, return NULL. The > > > core falls back to stepping past the instruction in-line instead in > > > that case. */ > > > @@ -1478,6 +1478,16 @@ typedef int (gdbarch_addressable_memory_unit_size_ftype) (struct gdbarch *gdbarc > > > extern int gdbarch_addressable_memory_unit_size (struct gdbarch *gdbarch); > > > extern void set_gdbarch_addressable_memory_unit_size (struct gdbarch *gdbarch, gdbarch_addressable_memory_unit_size_ftype *addressable_memory_unit_size); > > > > > > +/* Examine instruction at PC. If instruction at PC is an unconditional > > > + branch, return the address to which control is transferred when the > > > + branch is taken. Return 0 when this method is not implemented by > > > + architecture, PC refers to an invalid address, or instruction at PC > > > + is not an unconditional branch. */ > > > + > > > +typedef CORE_ADDR (gdbarch_unconditional_branch_address_ftype) (struct gdbarch *gdbarch, CORE_ADDR pc); > > > +extern CORE_ADDR gdbarch_unconditional_branch_address (struct gdbarch *gdbarch, CORE_ADDR pc); > > > +extern void set_gdbarch_unconditional_branch_address (struct gdbarch *gdbarch, gdbarch_unconditional_branch_address_ftype *unconditional_branch_address); > > > > > How would you feel about changing the function so that it returned a > > bool and placed the address into a CORE_ADDRESS passed by pointer? > > Or I could actually spot your revised patch and see you've already > done this :-/ Oops. I'm guilty of this too. (I should have looked ahead to see this email.) Kevin