Re: [PATCH v2 10/22] sim/erc32: Switched emulated memory to host endian order.

Jiri Gaisler
2015-02-22T23:10:50Z

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On 02/22/2015 09:51 PM, Mike Frysinger wrote:
> On 19 Feb 2015 23:31, Jiri Gaisler wrote:
>> + *((unsigned short *) &(mem[waddr])) = *data & 0x0ffff;
>
> this violates strict aliasing. you can't cast the RHS side like this. it also
> violates alignment since the buffer is passed in as unsigned char *.

I don't fully agree on this. *mem holds the pointer to romb or ramb,
which are defined as unsigned char arrays. However, their definition is
is preceded with an integer define:

static uint32 mem_blockprot; /* RAM block write protection enabled */
static unsigned char romb[ROM_SZ];
static unsigned char ramb[RAM_END - RAM_START];

This means that romb and ramb are aligned on a 4-byte boundary
on systems where this matters (SPARC, ARM). When casting to short,
waddr is always aligned on 2, when casting to integer waddr is
always aligned on 4. So the casting really works without getting
an alignment error. Can I rather document this instead of using
a slower memcpy()? In cpu simulation, performance is essential and
every (host) instruction counts.

>
> you should use memcpy() instead. on systems where unaligned access are OK, gcc
> should optimize it down to a few load/stores anyways.

memcpy() does have some overhead compared to a single store ...

Jiri.

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