Re: [PATCH 2/4] Match instruction adjusts SP in thumb

Yao Qi
2014-09-24T12:56:37Z

On 07/03/2014 02:09 PM, Yao Qi wrote:
> - else if ((insn & 0xfe00) == 0xbc00) /* pop <registers> */
> + else if (thumb_instruction_restores_sp (insn))
> {
> found_stack_adjust = 1;
> - if (insn & 0x0100) /* <registers> include PC. */
> + if ((insn & 0xfe00) == 0xbd00) /* pop <registers, PC> */
> found_return = 1;
> }

This patch fixes a typo in the bit mask I've made in my previous code
refactor. If PC is in the register list, the bit 8 is one, so bit
mask 0xff00 should be used. Current condition is a constant false.
Regression tested on arm-linux-gnueabi. Patch is pushed in.

gdb:

2014-09-24 Yao Qi <yao@codesourcery.com>

* arm-tdep.c (thumb_in_function_epilogue_p): Fix typo in the
bitmask.

diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index 742053f..5dccf0a 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -3273,7 +3273,7 @@ thumb_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
found_return = 1;
else if (thumb_instruction_restores_sp (insn))
{
- if ((insn & 0xfe00) == 0xbd00) /* pop <registers, PC> */
+ if ((insn & 0xff00) == 0xbd00) /* pop <registers, PC> */
found_return = 1;
}
else if (thumb_insn_size (insn) == 4) /* 32-bit Thumb-2 instruction */