Re: [patch, sim] Add isel instruction

Abid, Hafiz
2013-04-30T10:53:49Z

Joel,
Thansk for lettting me know. If this is urgent for you then I can
revert as it may take me some time to find a fix.

Regards,
Abid

On 30/04/13 11:47:01, Joel Brobecker wrote:
> Abid,
>
> > This patch adds support for isel instruction in the ppc simulator.
> > Tested manually by running a small assembly file through the
> > simulator. Is this ok?
> >
> > Regards,
> > Abid
> >
> > sim/ChangeLog:
> > 2013-04-19 Nathan Froyd <froydnj@codesourcery.com>
> >
> > * ppc-instructions (isel): New instruction.
>
> This patch causes the sim build to fail when configured with
> --enable-sim-float=spe. The full configure command-line used was:
>
> % configure --disable-nls --disable-tui --without-zlib
> --prefix=/[...]/install --enable-sim --enable-sim-float=spe
> --without-python --with-libexpat-prefix=/[...]/libexpat
> --target=powerpc-eabispe
>
> The error I get is:
>
> | ./igen -E -F 32,f,o,e500 -CSRI 1024 -N 5 \
> | [...]
> | expanding ...
> | -n icache.h
> | -h
> | -c tmp-icache.h
> | gen-icache.c:66: assertion failed - entry->nr_insn == 1
> | make: *** [tmp-igen] Error 1
>
> I am not familiar with this part of the code, so can you please fix
> or revert?
>
> Interestingly, no problem with --enable-sim-float=altivec.
>
> Thank you.
>
> >
> > diff --git a/sim/ppc/ppc-instructions b/sim/ppc/ppc-instructions
> > index 1b8fd89..d76a765 100644
> > --- a/sim/ppc/ppc-instructions
> > +++ b/sim/ppc/ppc-instructions
> > @@ -3455,6 +3455,19 @@
> > void::function::invalid_zero_divide_operation:cpu *processor,
> > unsigned_word cia,
> > PPC_INSN_MFCR(RT_BITMASK);
> >
> > #
> > +# I.3.3.15 Fixed-Point Select
> > +#
> > +
> > +0.31,6.RT,11.RA,16.RB,21.BF,26.15,31./:A::isel:Integer Select
> > + unsigned_word a;
> > + if (RA_is_0) a = 0;
> > + else a = *rA;
> > + if (CR & (1 << (31 - BF)))
> > + *rT = a;
> > + else
> > + *rT = *rB;
> > +
> > +#
>
> --
> Joel
>