From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 10787 invoked by alias); 13 Nov 2012 14:27:51 -0000 Received: (qmail 10774 invoked by uid 22791); 13 Nov 2012 14:27:50 -0000 X-SWARE-Spam-Status: No, hits=-3.1 required=5.0 tests=AWL,BAYES_00,KHOP_THREADED,RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from sibelius.xs4all.nl (HELO glazunov.sibelius.xs4all.nl) (83.163.83.176) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 13 Nov 2012 14:27:41 +0000 Received: from glazunov.sibelius.xs4all.nl (kettenis@localhost [127.0.0.1]) by glazunov.sibelius.xs4all.nl (8.14.5/8.14.3) with ESMTP id qADERX84027670; Tue, 13 Nov 2012 15:27:33 +0100 (CET) Received: (from kettenis@localhost) by glazunov.sibelius.xs4all.nl (8.14.5/8.14.3/Submit) id qADERVUl015787; Tue, 13 Nov 2012 15:27:32 +0100 (CET) Date: Tue, 13 Nov 2012 14:27:00 -0000 Message-Id: <201211131427.qADERVUl015787@glazunov.sibelius.xs4all.nl> From: Mark Kettenis To: yao@codesourcery.com CC: gdb-patches@sourceware.org In-reply-to: <1352816140-3221-1-git-send-email-yao@codesourcery.com> (message from Yao Qi on Tue, 13 Nov 2012 22:15:40 +0800) Subject: Re: [PATCH/arm] Backtrace through exception frames on arm/cortex-m target References: <1352816140-3221-1-git-send-email-yao@codesourcery.com> Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2012-11/txt/msg00314.txt.bz2 > From: Yao Qi > Date: Tue, 13 Nov 2012 22:15:40 +0800 > > Hi, > This patch adds support for backtracing through exceptions on > M-profile targets. Dan wrote this patch two years ago, tested > by hand that set a breakpoint on an interrupt handler and GDB will > show the complete stack frame including the exception handler > and the source location that caused the fault. I update the patch a > little for some API changes in GDB trunk. > > I considered to write a test case for this, but it hard to write > single case for different corex-m boards with different system > libraries. So no test case is included. > > Regression tested for arm-none-eabi (-march=armv6-m and -march=armv7-m > respectively) and arm-none-linux-gnueabi (-marm/-mthumb > -march=armv4/-mthumb -march=armv7-a). OK to apply? No. Because... > diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c > index 1a67366..5f22649 100644 > --- a/gdb/arm-tdep.c > +++ b/gdb/arm-tdep.c > @@ -448,6 +448,11 @@ arm_pc_is_thumb (struct gdbarch *gdbarch, CORE_ADDR memaddr) > static CORE_ADDR > arm_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR val) > { > + /* On M-profile devices, do not strip the low bit from EXC_RETURN > + (the magic exception return address). */ > + if (gdbarch_tdep (gdbarch)->is_m && (val & 0xfffffff0) == 0xfffffff0) > + return val; > + > if (arm_apcs_32) > return UNMAKE_THUMB_ADDR (val); > else > @@ -2926,6 +2931,103 @@ struct frame_unwind arm_stub_unwind = { > arm_stub_unwind_sniffer > }; > > +static struct arm_prologue_cache * > +arm_m_exception_cache (struct frame_info *this_frame) > +{ > + struct gdbarch *gdbarch = get_frame_arch (this_frame); > + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); > + struct arm_prologue_cache *cache; > + CORE_ADDR unwound_sp; > + LONGEST xpsr; > + > + cache = FRAME_OBSTACK_ZALLOC (struct arm_prologue_cache); > + cache->saved_regs = trad_frame_alloc_saved_regs (this_frame); > + > + unwound_sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); Calling get_frame_register_unsign(this_frame, ...) in the unwinder itself is verboten!.