From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 18997 invoked by alias); 11 May 2012 19:31:29 -0000 Received: (qmail 18938 invoked by uid 22791); 11 May 2012 19:31:28 -0000 X-SWARE-Spam-Status: No, hits=-4.3 required=5.0 tests=AWL,BAYES_00,KHOP_RCVD_UNTRUST,NO_DNS_FOR_FROM,RCVD_IN_DNSWL_HI,RCVD_IN_HOSTKARMA_W,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mga03.intel.com (HELO mga03.intel.com) (143.182.124.21) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 11 May 2012 19:31:15 +0000 Received: from azsmga002.ch.intel.com ([10.2.17.35]) by azsmga101.ch.intel.com with ESMTP; 11 May 2012 12:31:15 -0700 X-ExtLoop1: 1 Received: from gnu-6.sc.intel.com ([10.3.194.135]) by AZSMGA002.ch.intel.com with ESMTP; 11 May 2012 12:31:14 -0700 Received: by gnu-6.sc.intel.com (Postfix, from userid 500) id 7817BC18B6; Fri, 11 May 2012 12:31:14 -0700 (PDT) Date: Fri, 11 May 2012 19:31:00 -0000 From: "H.J. Lu" To: GDB Subject: PATCH: Check DS segment register for x32 process Message-ID: <20120511193114.GA5097@intel.com> Reply-To: "H.J. Lu" MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2012-05/txt/msg00438.txt.bz2 Hi, This patch checks DS segment register for x32 process. Tested on Linux/x86-64. OK to install? Thanks. H.J. --- * amd64-linux-nat.c (AMD64_LINUX_X32_DS): New. (amd64_linux_read_description): Check DS segment register for x32 process. diff --git a/gdb/amd64-linux-nat.c b/gdb/amd64-linux-nat.c index 3be8404..97c9a49 100644 --- a/gdb/amd64-linux-nat.c +++ b/gdb/amd64-linux-nat.c @@ -756,16 +945,23 @@ amd64_linux_siginfo_fixup (siginfo_t *native, gdb_byte *inf, int direction) Value of CS segment register: 1. 64bit process: 0x33. 2. 32bit process: 0x23. + + Value of DS segment register: + 1. LP64 process: 0x0. + 2. X32 process: 0x2b. */ #define AMD64_LINUX_USER64_CS 0x33 +#define AMD64_LINUX_X32_DS 0x2b static const struct target_desc * amd64_linux_read_description (struct target_ops *ops) { unsigned long cs; + unsigned long ds; int tid; int is_64bit; + int is_x32; static uint64_t xcr0; /* GNU/Linux LWP ID's are process ID's. */ @@ -782,6 +978,18 @@ amd64_linux_read_description (struct target_ops *ops) is_64bit = cs == AMD64_LINUX_USER64_CS; + /* Get DS register. */ + errno = 0; + ds = ptrace (PTRACE_PEEKUSER, tid, + offsetof (struct user_regs_struct, ds), 0); + if (errno != 0) + perror_with_name (_("Couldn't get DS register")); + + is_x32 = ds == AMD64_LINUX_X32_DS; + + if (sizeof (void *) == 4 && is_64bit && !is_x32) + error (_("Can't debug 64-bit process with 32-bit GDB")); + if (have_ptrace_getregset == -1) { uint64_t xstateregs[(I386_XSTATE_SSE_SIZE / sizeof (uint64_t))]; @@ -809,14 +1017,24 @@ amd64_linux_read_description (struct target_ops *ops) && (xcr0 & I386_XSTATE_AVX_MASK) == I386_XSTATE_AVX_MASK) { if (is_64bit) - return tdesc_amd64_avx_linux; + { + if (is_x32) + return tdesc_x32_avx_linux; + else + return tdesc_amd64_avx_linux; + } else return tdesc_i386_avx_linux; } else { if (is_64bit) - return tdesc_amd64_linux; + { + if (is_x32) + return tdesc_x32_linux; + else + return tdesc_amd64_linux; + } else return tdesc_i386_linux; }