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Date: Sat, 21 Apr 2012 17:10:00 -0000
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From: Mark Kettenis <mark.kettenis@xs4all.nl>
To: davem@davemloft.net
CC: gdb-patches@sourceware.org
In-reply-to: <20120420.203408.165318333491237734.davem@davemloft.net> (message	from David Miller on Fri, 20 Apr 2012 20:34:08 -0400 (EDT))
Subject: Re: [PATCH] Handle sparc compare-and-branch
References:  <20120420.203408.165318333491237734.davem@davemloft.net>
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> Date: Fri, 20 Apr 2012 20:34:08 -0400 (EDT)
> From: David Miller <davem@davemloft.net>
> 
> SPARC-T4 adds a "compare and branch" instruction which fuses
> a compare and a branch instruction into one.  The branch
> is non-delayed, there are no anulling facilities, and the
> displacement is 10-bits.

Is this new instruction documented anywhere?

> This also corrects the existing bit test for Branch on
> Integer Register.  The distinguising characteristic between
> Branch on Integer Register and Compare-and-Branch is bit
> 28.  The existing code was checking bit 24 for zero, but
> that's pointless because bit 24 is already covered by
> the "X_OP2 (insn) == 3" test.
> 
> Ok to commit?

Makes sense to me, so please go ahead.

> gdb/
> 
> 	* sparc-tdep.c (X_DISP10): Define.
> 	(sparc_analyze_control_transfer): Handle compare-and-branch.